{"id":2519460,"url":"https://alion.io/job/synopsys-asic-physical-design-sr-engineer","title":"ASIC Physical Design, Sr Engineer","company":{"id":39954,"name":"Synopsys","domain":"synopsys.com","url":"https://alion.io/company/synopsys-inc","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Avature","truth_index":{"grade":"A","score":100,"open_postings":85,"ghost_share":0.035,"stale_share":0,"repost_share":0.176,"time_to_fill_p50_days":12,"computed_at":"2026-10-15T05:46:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bengaluru, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":19500,"max_usd":49000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":14},"experience_years_min":3,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Ansys RedHawk","optional":false},{"name":"Cadence Innovus","optional":false},{"name":"Cursor","optional":false},{"name":"Synopsys Fusion Compiler","optional":false},{"name":"Synopsys IC Validator","optional":false},{"name":"Synopsys PrimeTime","optional":false},{"name":"Synopsys StarRC","optional":false}],"status":"live","first_seen_at":"2026-10-14T10:33:58Z","employer_posted_date":"2026-10-14","last_verified_at":"2026-10-15T09:39:11Z","board_verified":true,"closed_at":null,"days_open":1,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":1},"description":"Job Description and Requirements\nSenior Engineer, Physical Design - PnR Implementation & Methodology\nWe Are\nSynopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.\nYou Are\nYou are an experienced Physical Design engineer with strong expertise in Place and Route (PnR) design implementation and flow methodologies. You have a comprehensive understanding of the complete PnR development flow and hands-on experience using industry-standard physical design tools such as Synopsys Fusion Compiler (FC) or Cadence Innovus.\nYou understand physical design signoff methodologies and have exposure to tools such as IC Validator (ICV), RedHawk, PrimeTime, and StarRC, or equivalent solutions. Along with executing designs, you are interested in continuously improving implementation flows, methodologies, and Power, Performance, and Area (PPA).\nYou bring strong debugging, analytical, and problem-solving capabilities and are comfortable collaborating with cross-cultural, geographically distributed, and matrixed engineering teams.\nWhat You'll Be Doing\nDrive Place and Route (PnR) implementation for complex semiconductor designs.\nExecute and optimize physical design flows across key stages of the PnR lifecycle.\nWork extensively with Fusion Compiler (FC) and/or Innovus for design implementation.\nPerform and support physical design signoff using methodologies and tools such as ICV, RedHawk, PrimeTime, and StarRC, or similar.\nAnalyze implementation results and identify opportunities for PPA improvement.\nContribute to continuous improvement of physical design flows, methodologies, and flow usage.\nDebug complex implementation and flow issues using strong analytical and problem-solving skills.\nCollaborate with engineering teams across different functions, geographies, and cultures.\nExplore productivity improvements through modern engineering and AI-assisted tools such as Cursor.\nThe Impact You Will Have\nHelp deliver high-quality physical design implementation for advanced semiconductor designs.\nImprove Power, Performance, and Area (PPA) through design and flow optimization.\nEnhance the efficiency, robustness, and scalability of PnR implementation methodologies.\nIdentify and resolve complex physical design and signoff issues.\nContribute to continuous improvement and automation of implementation flows.\nEnable effective collaboration across global and cross-functional engineering teams.\nWhat You'll Need\n BS/B.Tech in Electrical Engineering (EE), Electronics & Communication Engineering (ECE), or equivalent with 3+ years of relevant experience, OR\nMS/M.Tech in EE, ECE, or equivalent with 2+ years of relevant experience.\nStrong hands-on experience in PnR design implementation and/or PnR flow methodologies.\nComprehensive understanding of the PnR development flow.\nGood hands-on experience with Fusion Compiler (FC) or Innovus.\nGood understanding of physical design signoff tools and methodologies.\nExperience or exposure to ICV, RedHawk, PrimeTime, StarRC, or similar tools.\nExperience contributing to PPA improvement and flow optimization activities.\nStrong debugging, analytical, and problem-solving skills.\nExcellent collaboration and influencing skills with the ability to work effectively in cross-cultural, multi-geography, and matrixed teams.\nExposure to AI-assisted engineering tools such as Cursor is a plus.\nWho You Are\nYou approach complex physical design challenges methodically and drive them through resolution.\nYou enjoy debugging implementation, timing, physical verification, and flow-related issues.\nYou look beyond basic design closure and continuously seek opportunities to improve PPA and implementation efficiency.\nYou communicate technical issues clearly and collaborate effectively with geographically distributed teams.\nYou are comfortable taking ownership while working as part of a broader engineering organization.\nYou are curious about new methodologies, automation, and AI-assisted engineering approaches.\nThe Team You'll Be Part Of\nYou will be part of a physical design engineering team focused on PnR implementation, design closure, signoff, flow methodology, and PPA optimization. You will collaborate with cross-functional and geographically distributed engineering teams to improve implementation quality, resolve complex design challenges, and continuously enhance physical design methodologies.\nRewards and Benefits\nWe offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.\nAt Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.","description_format":"text","description_chars":5292,"description_truncated":false,"requirements":{"experience_years_min":3,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":true},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["EDA Software","Simulation & Digital Twin Software","Semiconductor IP & Chip Design Services"],"lifecycle":[{"event":"open","at":"2026-10-14T10:33:58Z"}],"visa":[],"liveness":{"score":90,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.903,"p_room":1,"age_days":0,"expected_fill_days":12,"reasons":["conf:0","velocity","win:early","comp:brand"],"computed_at":"2026-10-15T05:46:00Z"},"pay":null,"html_url":"https://alion.io/job/synopsys-asic-physical-design-sr-engineer","json_url":"https://alion.io/job/synopsys-asic-physical-design-sr-engineer.json","meta":{"generated_at":"2026-10-15T10:42:16Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"assistant_verified","counted_by":"address","units_charged":1,"used_today":1890,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-16T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":39954},"rest":"https://alion.io/mcp/rest/get_company?id=39954"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fsynopsys-asic-physical-design-sr-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fsynopsys-asic-physical-design-sr-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fsynopsys-asic-physical-design-sr-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/synopsys-asic-physical-design-sr-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fsynopsys-asic-physical-design-sr-engineer"}]}