{"id":519348,"url":"https://alion.io/job/synopsys-high-speed-phy-ip-applications-engineering-principal-engineer-17697","title":"High-Speed PHY IP Applications Engineering, Principal Engineer-17697","company":{"id":39954,"name":"Synopsys","domain":"synopsys.com","url":"https://alion.io/company/synopsys-inc","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Avature","truth_index":{"grade":"A","score":100,"open_postings":76,"ghost_share":0.039,"stale_share":0,"repost_share":0.171,"time_to_fill_p50_days":15,"computed_at":"2026-10-22T06:10:10Z"}},"role":"Backend","role_family":"Backend","seniority":"lead","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Yongin, South Korea"],"countries":["KR"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":null,"experience_years_min":10,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[],"status":"live","first_seen_at":"2026-09-07T22:53:51Z","employer_posted_date":"2026-09-11","last_verified_at":"2026-10-22T20:29:32Z","board_verified":true,"closed_at":null,"days_open":44,"trust":{"level":"ok","repost_count":0,"flags":[],"days_open":44},"description":"Job Description and Requirements\nWe Are\nSynopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.\nYou Are\nYou have spent years deep in ASIC design and verification, and somewhere along the way you realized that the most satisfying part of the work is not just getting the design right, it is helping someone else get their design right. You enjoy isolating root causes, asking the right questions, and driving issues to closure under tapeout pressure. You can work across the ASIC flow (synthesis, CDC, STA constraints, bring-up debug) and communicate clearly with both architects and implementation teams.\nWhat You'll Be Doing\nProvide technical support to customers integrating DesignWare USB Mixed Signal PHY IP as the primary focus, from initial integration through silicon bring-up and debug\nTroubleshoot customer issues across synthesis, static timing analysis, design-for-test, and clock domain crossing in USB PHY and SoC integration contexts\nGuide customers through USB 2.0, USB 3.x, and Type-C implementation considerations and design tradeoffs, and help define bring-up and debug plans that reduce time-to-silicon\nCollaborate closely with the Korea AE team and Synopsys R&D and product teams to escalate complex issues, drive root-cause analysis, and ensure timely closure during critical milestones\nIn addition to USB, contribute to customer support coverage for other high-speed interface PHY IP in collaboration with colleagues, leveraging similar integration and debug fundamentals (e.g., MIPI, PCIe, HDMI, etc.; excluding DDR)\nDeliver technical presentations and integration best practices to customer engineering teams during design reviews and key program checkpoints\nTravel occasionally to customer sites across Korea and the region to support critical milestones\nThe Impact You Will Have\nEnable customer success on high-stakes tapeouts by resolving USB PHY integration issues that would otherwise delay schedules\nReduce time-to-silicon by providing clear, actionable guidance during integration, constraints closure, and silicon bring-up\nBuild deep technical relationships with leading semiconductor companies in Korea as their trusted advisor\nShape future IP releases by channeling real customer pain points back into the product team\nExpand Synopsys footprint in customer accounts through technical depth, responsiveness, and cross-team collaboration\nWhat You'll Need\nBachelor's or Master's in Electrical Engineering or Computer Engineering with 10 to 20+ years of ASIC design, verification, or SoC integration experience\nStrong working knowledge of synthesis, static timing analysis, design-for-test, and clock domain crossing\nAbility to work independently and drive ambiguous, customer-driven issues to resolution\nExcellent communication skills in Korean and English, able to explain complex concepts clearly\nUSB 2.0, USB 3.x, Type-C, or USB PHY integration experience is a strong plus\nBroader high-speed interface background (e.g., MIPI, PCIe, HDMI) is a plus and helps with collaborative cross-IP support coverage\nWillingness to travel occasionally within Korea and the region\nWho You Are\nYou can take a vague customer complaint and within two questions know whether it is a constraint issue, integration problem, or something else\nYou are comfortable saying \"I do not know, but I will find out\" and then actually following through\nYou know when to pull in the right specialist from R&D and how to frame the problem so they can help\nYou can explain a complex tradeoff to a customer architect in two sentences without losing the nuance\nYou see customer edge cases as opportunities to improve, not complaints to deflect\nAt Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.","description_format":"text","description_chars":4299,"description_truncated":false,"requirements":{"experience_years_min":10,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[{"language":"Korean","level":"All levels","optional":false}]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["EDA Software","Application Security","Semiconductor IP & Chip Design Services"],"lifecycle":[{"event":"open","at":"2026-09-07T22:53:51Z"},{"event":"close","at":"2026-09-11T01:53:52Z"},{"event":"reopen","at":"2026-09-11T04:54:00Z"}],"visa":[],"liveness":{"score":17,"band":"cold","label":"Long shot","p_open":1,"p_active":0.597,"p_room":0.28,"age_days":44,"expected_fill_days":15,"reasons":["conf:1","velocity","win:tail","crowd:brand"],"computed_at":"2026-10-22T06:10:10Z"},"pay":null,"html_url":"https://alion.io/job/synopsys-high-speed-phy-ip-applications-engineering-principal-engineer-17697","json_url":"https://alion.io/job/synopsys-high-speed-phy-ip-applications-engineering-principal-engineer-17697.json","meta":{"generated_at":"2026-10-22T22:24:06Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":7590,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-23T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":39954},"rest":"https://alion.io/mcp/rest/get_company?id=39954"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fsynopsys-high-speed-phy-ip-applications-engineering-principal-engineer-17697"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fsynopsys-high-speed-phy-ip-applications-engineering-principal-engineer-17697"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fsynopsys-high-speed-phy-ip-applications-engineering-principal-engineer-17697"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/synopsys-high-speed-phy-ip-applications-engineering-principal-engineer-17697\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fsynopsys-high-speed-phy-ip-applications-engineering-principal-engineer-17697"}]}