{"id":3019809,"url":"https://alion.io/job/synopsys-rd-engineering-principal-engineer-18966","title":"R&D Engineering, Principal Engineer - 18966","company":{"id":39954,"name":"Synopsys","domain":"synopsys.com","url":"https://alion.io/company/synopsys-inc","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Avature","truth_index":{"grade":"A","score":100,"open_postings":77,"ghost_share":0.039,"stale_share":0,"repost_share":0.169,"time_to_fill_p50_days":15,"computed_at":"2026-10-25T05:49:26Z"}},"role":"Hardware","role_family":"Hardware","seniority":"lead","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Sunnyvale, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":157000,"max_usd":297000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":609},"experience_years_min":10,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Python","optional":false},{"name":"Synopsys Design Compiler","optional":false},{"name":"Synopsys Fusion Compiler","optional":false},{"name":"Synopsys SpyGlass","optional":false},{"name":"Synopsys TestMAX","optional":false},{"name":"SystemVerilog","optional":false},{"name":"UVM","optional":false}],"status":"live","first_seen_at":"2026-10-21T17:31:07Z","employer_posted_date":"2026-10-21","last_verified_at":"2026-10-25T22:07:50Z","board_verified":true,"closed_at":null,"days_open":4,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":4},"description":"Job Description and Requirements\nWe Are\nSynopsys is a leader in silicon-to-systems engineering solutions, helping customers accelerate innovation in AI-driven products through industry-leading EDA, IP, and design solutions.\nYou Are\nAs a Principal Front-End Design Engineer, you will lead methodology, subsystem architecture, and AI-enabled design innovation across IP and SoC development. You will build scalable design solutions, improve engineering productivity, and drive best practices across global teams.\nWhat You'll Be Doing\nDevelop and deploy AI-driven solutions for verification, synthesis, constraints, and DFT workflows.\nArchitect reusable subsystem reference designs for Synopsys IP.\nDebug and optimize front-end design methodologies and automation flows.\nDrive adoption of best practices across design and verification teams.\nCollaborate with EDA, IP, and customer-facing engineers to solve complex design challenges.\nMentor engineers through technical leadership and knowledge sharing.\nWhat You'll Need\nBS/MS in Electrical Engineering, Computer Engineering, or related field.\n10+ years of ASIC, SoC, or IP design and verification experience.\nExpertise in verification, synthesis, timing constraints, DFT, CDC/RDC, or lint methodologies.\nStrong experience with Synopsys tools such as VCS, VC SpyGlass, Fusion Compiler, Design Compiler, and TestMAX.\nProficient in SystemVerilog, UVM, Tcl, Python, or similar languages.\nDemonstrated technical leadership and influence across cross-functional engineering teams.\nWhat Sets You Apart\nDeep understanding of IP reuse, subsystem integration, and SoC development.\nPassion for applying AI to improve design productivity and quality.\nStrong problem-solving, communication, and mentoring skills.\nAbility to translate complex technical challenges into scalable, practical solutions.\nThe Team You'll Be Part Of\nYou will be a member of the Digital Methodology Interop Engineering team, a team of engineers dedicated to advancing IP and subsystem design excellence at Synopsys. The team collaborates across global sites, driving innovation in methodology, tool integration, and best practices. You will help shape the future of SoC design with Synopsys IP.\nRewards and Benefits\nWe offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.\nAt Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.\nIn addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. 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