{"id":3741391,"url":"https://alion.io/job/synopsys-rd-engineering-principal-engineer-19515","title":"R&D Engineering, Principal Engineer-19515","company":{"id":39954,"name":"Synopsys","domain":"synopsys.com","url":"https://alion.io/company/synopsys-inc","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Avature","truth_index":{"grade":"A","score":99,"open_postings":64,"ghost_share":0.047,"stale_share":0,"repost_share":0.188,"time_to_fill_p50_days":18,"computed_at":"2026-11-08T05:47:12Z"}},"role":"Industrial Engineering","role_family":"Industrial Engineering","seniority":"lead","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bengaluru, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":null,"experience_years_min":15,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Linux","optional":false},{"name":"Python","optional":false},{"name":"Synopsys FineSim","optional":false},{"name":"Synopsys HSPICE","optional":false},{"name":"Synopsys PrimeTime","optional":false}],"status":"live","first_seen_at":"2026-11-04T11:47:48Z","employer_posted_date":"2026-11-04","last_verified_at":"2026-11-08T07:28:07Z","board_verified":true,"closed_at":null,"days_open":3,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":3},"description":"Job Description and Requirements\nPrincipal Timing Signoff Engineer\nPrincipal Static Timing Analysis Engineer\nPrincipal Standard Cell Library Timing Engineer\nPrincipal STA Methodology Engineer\nPrincipal Library Signoff Architect\nWe Are\nSynopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.\nYou Are\nYou have spent the better part of two decades chasing timing closure, and somewhere along the way you stopped thinking of signoff as a gate and started thinking of it as a prediction problem. You know that the difference between a library that works in a lab and one that ships in a million AI chips comes down to how well you modeled variation six months before tape-out. You have debugged enough customer escalations to recognize the smell of a characterization corner case, a parasitic extraction mismatch, or a setup check that looked fine until someone dropped VDD by 50 millivolts.\nYou do not wait for perfect data. You work with what the foundry gave you, what the characterization team extracted, and what the customer is seeing in their design, and you triangulate toward truth. You have built signoff flows that other engineers actually use, not because you mandated them, but because they solve real problems. You can sit in a room with a characterization engineer, a customer's STA lead, and a foundry PDK owner and walk out with a plan that everyone believes in.\nAt Synopsys, you will work on standard cell libraries that power some of the most advanced semiconductor designs in production today. The problems are hard, the nodes are bleeding-edge, and the work you do will directly affect whether a chip meets its performance target or not.\nWhat You'll Be Doing\nOwn timing signoff methodology for standard cell libraries across TSMC N3, N2, N5, N7, and derivative nodes, defining setup, hold, recovery, removal, pulse-width, and noise margins that hold up in silicon\nDevelop and validate multi-corner, multi-mode signoff flows for low-VDD, high-performance, and AI/compute SoCs, accounting for AOCV, POCV, SOCV, aging effects, and dynamic voltage drop\nDrive correlation analysis between Liberty models, PrimeTime STA results, HSPICE simulations, and silicon measurements to improve timing prediction accuracy and close signoff gaps\nDebug critical customer-reported timing issues, root-cause discrepancies between characterization, signoff, and deployment, and define corrective actions that prevent recurrence\nBuild automation infrastructure in Python and Tcl to scale signoff validation, quality checks, and methodology deployment across multiple library releases\nCollaborate with characterization, CAD, modeling, EDA vendors, and foundry partners to influence signoff methodology direction and resolve advanced-node timing challenges\nCreate technical documentation, best-practice guidelines, and deployment recommendations that internal teams and external customers rely on for signoff success\nThe Impact You Will Have\nYour signoff methodologies will define how Synopsys standard cell libraries are validated and deployed across dozens of customer tape-outs on the most advanced nodes in production\nYou will directly improve the accuracy of timing models that determine whether high-performance AI and compute chips meet their frequency, power, and yield targets\nYour correlation work will close the gap between what we predict in Liberty and what customers measure in silicon, reducing over-design margin and enabling better PPA\nYou will resolve customer escalations that are blocking tape-out schedules, turning critical timing failures into understood, fixable methodology gaps\nYour automation and QA infrastructure will scale signoff validation across multiple nodes, reducing characterization cycle time and catching issues before libraries ship\nYou will mentor senior engineers and technical leads, raising the bar for timing signoff expertise across the standard cell library development organization\nYour technical leadership will shape how Synopsys approaches variation-aware timing, low-VDD signoff, and advanced-node methodology for the next generation of process technologies\nWhat You'll Need\n15+ years of semiconductor industry experience with significant depth in timing signoff, static timing analysis, and standard cell library development\nRecognized expertise in STA and signoff methodologies for advanced process nodes, ideally including direct experience with TSMC N7, N5, N3, or equivalent\nDeep hands-on proficiency with Synopsys PrimeTime, PrimeTime-SI, SiliconSmart or Liberate, HSPICE, Spectre, and FineSim\nStrong understanding of Liberty modeling, LVF, AOCV, POCV, SOCV, statistical timing, and variation-aware signoff techniques\nProven track record defining and deploying signoff methodologies that have been adopted across multiple products, customers, or business units\nExpert-level automation skills in Python and Tcl, with experience building scalable signoff and QA infrastructure in Linux environments\nExperience correlating STA results, SPICE simulations, parasitic extraction, and silicon measurements to drive signoff accuracy and resolve discrepancies\nWho You Are\nYou can look at a timing report with a 10ps violation and know within two questions whether it is a characterization issue, a parasitic problem, or a signoff methodology gap\nYou have led root-cause investigations that spanned characterization, customer designs, foundry PDKs, and EDA tool behavior, and you know how to keep all those threads moving without losing momentum\nYou are comfortable presenting signoff methodology recommendations to senior management, strategic customers, and foundry partners, and you can back up your position with data\nYou push back when a characterization corner looks wrong or a signoff criterion does not match what you are seeing in silicon, and you do it in a way that moves the conversation forward\nYou have mentored engineers through complex timing correlation problems and helped them build the instinct for what matters and what is noise\nYou treat customer escalations as learning opportunities, not interruptions, and you use them to make the next library release better\nThe Team You'll Be Part Of\nYour recruiter will share more about the team structure and mission during the interview process.\nRewards and Benefits\nWe offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.\nAt Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.","description_format":"text","description_chars":7200,"description_truncated":false,"requirements":{"experience_years_min":15,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["EDA Software","Simulation & Digital Twin Software","Semiconductor IP & Chip Design Services"],"lifecycle":[{"event":"open","at":"2026-11-04T11:47:48Z"}],"visa":[],"liveness":{"score":90,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.897,"p_room":1,"age_days":3,"expected_fill_days":18,"reasons":["conf:2","velocity","win:early","comp:brand"],"computed_at":"2026-11-08T05:47:12Z"},"pay":null,"html_url":"https://alion.io/job/synopsys-rd-engineering-principal-engineer-19515","json_url":"https://alion.io/job/synopsys-rd-engineering-principal-engineer-19515.json","meta":{"generated_at":"2026-11-08T10:40:29Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":22958,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-11-09T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":39954},"rest":"https://alion.io/mcp/rest/get_company?id=39954"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fsynopsys-rd-engineering-principal-engineer-19515"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fsynopsys-rd-engineering-principal-engineer-19515"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fsynopsys-rd-engineering-principal-engineer-19515"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/synopsys-rd-engineering-principal-engineer-19515\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fsynopsys-rd-engineering-principal-engineer-19515"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":3741391}},{"tool":"search_jobs","arguments":{"company":"synopsys.com","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":3741391},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); https://alion.io/mcp with an Alion account has everything. Docs: https://alion.io/developers"}}