{"id":1311296,"url":"https://alion.io/job/synopsys-rd-engineering-sr-manager-16549","title":"R&D Engineering, Sr Manager-16549","company":{"id":39954,"name":"Synopsys","domain":"synopsys.com","url":"https://alion.io/company/synopsys-inc","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Avature","truth_index":{"grade":"A","score":100,"open_postings":99,"ghost_share":0.03,"stale_share":0,"repost_share":0.162,"time_to_fill_p50_days":7,"computed_at":"2026-09-29T05:45:00Z"}},"role":"Industrial Engineering","role_family":"Industrial Engineering","seniority":"senior","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Hyderabad, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":14000,"max_usd":32000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":20},"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Perl","optional":false},{"name":"Python","optional":false}],"status":"live","first_seen_at":"2026-09-26T16:28:35Z","employer_posted_date":"2026-09-26","last_verified_at":"2026-09-26T19:50:00Z","board_verified":false,"closed_at":null,"days_open":3,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":3},"description":"Job Description and Requirements\nEmbedded memory design\nJob Description and Requirements\nThe Embedded Memory and Logic Team is part of Solutions Group and is responsible for standard and custom embedded SRAMs/ROMs/TCAMs development and provides both functional and physical views of memory in form of Memory compilers, A semiconductor intellectual property (IP) for the design of complex integrated circuits. The team is completely responsible for all aspects of memory development starting from Bit Cell Analysis, Architecture Design, Characterization and Verification.\nResponsibilities\nManage a team and develop SRAM/Register file /TCAM /ROM architectures and circuit implementation techniques.\nSchematic entry, simulation of major blocks, layout planning, layout supervision and interface with CAD team for full verification and model generation.\nDesigning and implementing optimum low-power and area-efficient embedded memory (SRAM, register files, etc.) circuits and architectures.\nLearn and apply skills in memory compilers having Transistor level circuit Design.\nResolves a wide range of issues in creative ways\nInter-team interaction \nCustomer focus \nFrequently networks with senior internal and external personnel in own area of expertise\nExperience of FinFet Technology for Memory Design\nCan coordinate, facilitate, and monitor the daily activities of a small to large group of support resources within their section or project team \nWith minimal supervision, prioritizes workload to successfully manage multiple tasks and responsibilities\nProactively addresses and communicates issues impacting productivity\nAs a Manager, the individual will be involved in challenging projects and drive it to completion in record time.\nYou will quickly ramp on the existing flow, understand the challenges, and produce the work plan.\nYour expertise in deep submicron technology and Finfet, SRAM design, processor design, Digital design flow and teamwork skills will be highly leveraged to guide activity across the entire cross-discipline, multi-site team.\nYou will work with others to identify the issues, get buy-in on proposed solutions, and implement the solutions in time for the team to execute to schedule.\nSkills/Experience:\n10yrs+ Exposure to full embedded memory design flow: Architecture, circuit design, physical implementation, compiler automation, characterization, timing and model generation.\nBE/B.Tech/ME/M.Tech/MS in Electrical & Electronics Engineering from premium institute/university \nDeep understanding of SRAM/Register File architectures and advanced custom circuit implementations.\nDirect experience with the most advanced technology nodes. Familiarity with variation-aware design in nanometre technology nodes\nMastery in scripting using Perl, python for automation\nFundamentals:\nUnderstanding of RC circuit of 1st and 2nd order.\nBasics of Digital design (realization of Boolean function using Gates, Mux etc)\nFundamentals of Transfer function and its analysis for stability etc.\nStrong CMOS fundamentals\nKnowledge of CMOS fabrication\nGood digital design knowledge\nExposure to basic Analog fundamentals\nAt Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.","description_format":"text","description_chars":3412,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"master","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["EDA Software","Application Security","Semiconductor IP & Chip Design Services"],"lifecycle":[{"event":"open","at":"2026-09-26T16:28:35Z"}],"liveness":{"score":68,"band":"ok","label":"Likely open","p_open":0.9,"p_active":0.835,"p_room":0.9,"age_days":2,"expected_fill_days":7,"reasons":["conf:57","velocity","win:mid","comp:brand"],"computed_at":"2026-09-29T05:45:00Z"},"pay":null,"html_url":"https://alion.io/job/synopsys-rd-engineering-sr-manager-16549","json_url":"https://alion.io/job/synopsys-rd-engineering-sr-manager-16549.json","meta":{"generated_at":"2026-09-30T01:51:51Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","usage":{"tier":"crawler","counted_by":"address","units_charged":1,"used_today":1481,"day_limit":5000,"remaining_today":3519,"minute_limit":60,"resets_at":"2026-10-01T00:00:00Z"}}}