1,061,370open jobs
62,137companies
177,439added this week
Browse all
Salary
≈ $24k – $55k per year (Estimated)
Location
In office (Wuhan)
Seniority
Middle · 3+ years exp

Confirmed on the employer's own hiring board on Oct 2, 2026. First seen by Alion on Sep 30, 2026. Synopsys scores A on the Alion truth index.

Overview
Company
Impact
Profile match
Synopsys (NASDAQ: SNPS) is a premier American multinational technology corporation and the global leader in Electronic Design Automation (EDA), semiconductor intellectual property (IP), and software security and quality solutions. Headquartered in Sunnyvale, California, and led by CEO Sassine Ghazi, Synopsys operates on a B2B enterprise software, proprietary semiconductor IP licensing, and silicon engineering services model.

Job Description and Requirements

Seeking a highly motivated and innovative digital design engineer with knowledge of ASIC development flow.

The candidate would be working as part of a highly experienced mixed-signal design and verification team, targeting the current and next generation high speed SERDES, such as USB4.0v2, USB4.0, PCIe4.0, Ethernet, DP2.0, HDMI2.1, and MIPI MPHY products (up to 40 Gbps).

Solid theoretical and practical background in high-speed SERDES and data recovery circuits is a solid plus.

The position offers an excellent opportunity to work with a professional team of digital and mixed-signal engineers responsible for delivering high-end mixed-signal designs from specification development to performing functional and performance tests on prototype test-chips.

The PHY IP development is very dynamic and provides an endless list of challenges. The candidate would have an initial training done by the top experts in the field as well as continuous on the job training and assignments. The work is very challenging, not only given the constant technological changes but also given the ownership and the need to charter unknown waters.

Key Qualifications

  • MSEE graduate or BSEE plus minimum 3 years of digital design and verification experience in the industry
  • Good experience in writing block-level test-cases including constrained directed random tests
  • Must be familiar with Verilog and VCS. Good knowledge of back-end synthesis tools DC/PT is required
  • Must have knowledge of digital design methodologies, ATE production testing, DFT insertion, Synthesis constraints and flows
  • Scripting experience in Shell, Perl, Python and TCL is a plus
  • Good theoretical and practical understanding of digital signal processing and data recovery circuits is required
  • Good communication skills for interacting between different design groups and customer support teams are required
  • Must be self-motivated, proactive, and able to balance good design quality while meeting tight deadlines
  • Resolves issues in creative ways and exercises independent judgment in selecting methods and techniques to obtain solutions
  • May guide more junior peers with aspects of their job. Networks with senior internal and external personnel in own area of expertise
  • Must exhibit ability to produce good results as independently and as a team contributor

Preferred Experience

  • RTL coding, modeling of analog blocks, and writing complex system-level test-benches in Verilog
  • Defining synthesis design constraints and resolving STA issues as well as gate-level simulation failures
  • Defining Clock/Reset domain crossing design constraints and evaluating violations using CDC/RDC tools
  • Enhancing and maintaining existing SERDES PHY IPs supporting multiple protocols
  • Interacting with Application Engineers for customer support and resolving technical issues with Analog and P&R teams.

Our Silicon IP business is all about integrating more capabilities into an SoC-faster. We offer the world’s broadest portfolio of silicon IP-predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.

At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Free account
Stop reading job ads. Get the ones that fit.
One free account turns this page into a shortlist built around your stack, your level and your pay.
Match on every job. Stack, seniority, pay and location, scored against your profile.
1,061,370 open roles. Read straight off company career pages, refreshed every day.
Unlimited applications. Every one you send is tracked in one place, on-site or on a company board.
3 tailored CVs a month. Rewritten for the exact job you are applying to. Included free.
Create a free account Continue with Google
Free forever. No card. Under a minute.

Your match

How well do you fit this role?
Two answers are enough for a real match. No account needed.
Check my fit
Answers stay in this browser until you create an account.

Recommended for you based on this role

Hardware
Similar stack
Same company
Wuhan
Sr. Firmware Engineer 3 months ago
≈ $28k – $64k per year (Estimated) • In office • Bachelor's Degree • Tianjin
C
C#
C++
MATLAB
C
Embedded C
C#
.NET
DevOps
Ubuntu
Linux
Management
Agile
Scrum
Apply
≈ $32k – $75k per year (Estimated) • In office • 5+ years exp • Bachelor's Degree • Ningbo
C++
Management
Outlook
Microsoft Office
Apply
≈ $50k – $122k per year (Estimated) • In office • PhD • United Kingdom
Verilog
C++
VHDL
Apply
≈ $50k – $123k per year (Estimated) • In office • United Kingdom
Python
C++
MATLAB
DevOps
CI/CD
Linux
Windows
Robotics
Sensor Fusion
Apply
≈ $61k – $176k per year (Estimated) • In office • Internship • United Kingdom
Python
Apply
≈ $17k – $42k per year (Estimated) • In office • 5+ years exp • Bachelor's Degree • Hyderabad
Python
Perl
Chips/EDA
Synopsys PrimeTime
Synopsys Fusion Compiler
Synopsys IC Validator
Synopsys StarRC
Apply
≈ $16k – $36k per year (Estimated) • In office • 1+ year exp • Bachelor's Degree • Yekaterinburg
Python
PowerShell
DevOps
VMWare
KVM
Hyper-V
Linux
Windows
TCP/IP
DNS
DHCP
VLAN
BGP
OSPF
Cybersecurity
SIEM
DLP
Kaspersky
Apply
≈ $22k – $57k per year (Estimated) • In office • Full-Time • Bachelor's Degree • Moscow
Python
Bash
AI/ML
LLM
DevOps
Windows
TCP/IP
DNS
Cybersecurity
Wireshark
SIEM
Apply
≈ $69k – $144k per year (Estimated) • In office • 3+ years exp • Bachelor's Degree • Maia
Verilog
SystemVerilog
VHDL
DevOps
HPC
Apply
≈ $17k – $47k per year (Estimated) • In office • Internship • Hyderabad
Verilog
SystemVerilog
Chips/EDA
UVM
Apply
≈ $69k – $144k per year (Estimated) • In office • 3+ years exp • Bachelor's Degree • Maia
Verilog
SystemVerilog
VHDL
DevOps
HPC
Apply
≈ $17k – $42k per year (Estimated) • In office • 5+ years exp • Bachelor's Degree • Hyderabad
Python
Perl
Chips/EDA
Synopsys PrimeTime
Synopsys Fusion Compiler
Synopsys IC Validator
Synopsys StarRC
Apply
≈ $50k – $116k per year (Estimated) • In office • 5+ years exp • Bachelor's Degree • Maia
DevOps
RTOS
Apply
In office • 8+ years exp
Chips/EDA
Synopsys HSPICE
Apply
≈ $17k – $47k per year (Estimated) • In office • Internship • Hyderabad
Verilog
SystemVerilog
Chips/EDA
UVM
Apply
≈ $22k – $63k per year (Estimated) • In office • Full-Time • Wuhan
C++
C++
Qt
Apply
In office • Full-Time • 1+ year exp • Wuhan
Management
Microsoft Office
Apply
≈ $22k – $53k per year (Estimated) • In office • Full-Time • 4+ years exp • Bachelor's Degree • Beijing • Wuhan • Guangzhou • Shanghai
DevOps
GCP
Apply
In office • Full-Time • 2+ years exp • Wuhan
DevOps
Linux
Apply
底软工程师 2 days ago
In office • Full-Time • Wuhan
Apply
See all jobs
This is one of many
1,061,370 more open roles from verified company boards, updated every day.