{"id":1311218,"url":"https://alion.io/job/synopsys-silicon-validationverification-engineer-staff-engineer-17399","title":"Silicon Validation/Verification Engineer, Staff Engineer - 17399","company":{"id":39954,"name":"Synopsys","domain":"synopsys.com","url":"https://alion.io/company/synopsys-inc","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Avature","truth_index":{"grade":"A","score":100,"open_postings":99,"ghost_share":0.03,"stale_share":0,"repost_share":0.162,"time_to_fill_p50_days":7,"computed_at":"2026-09-28T05:45:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":"staff","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Nepean, Canada"],"countries":["CA"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":118000,"max_usd":214000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":23},"experience_years_min":5,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"BERT","optional":false},{"name":"Python","optional":false}],"status":"live","first_seen_at":"2026-09-26T16:23:53Z","employer_posted_date":"2026-09-26","last_verified_at":"2026-09-26T19:50:00Z","board_verified":false,"closed_at":null,"days_open":2,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":2},"description":"Job Description and Requirements\nWe Are\nSynopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.\nYou Are\nWe are seeking a Staff Validation Engineer to own bring-up, validation, characterization, and debug of high-speed memory PHY subsystems including DDR, LPDDR, and HBM. You will work across silicon, firmware, board, and system domains from first silicon through production readiness and help define validation strategy, lab methodology, and automation infrastructure.\nThis is a hands-on technical leadership role for someone who is equally comfortable with oscilloscope/VNA/BERT measurements, board-level design tradeoffs, and building automation to scale validation across PVT corners and product generations.\nWhat You'll Be Doing\nLead post-silicon bring-up and validation of DDR, LPDDR, and HBM PHY subsystems on evaluation boards and customer-like platforms.\nExecute and own PHY training/tuning validation (read/write leveling, gate training, Vref/ODT, timing alignment, calibration convergence, margining).\nDevelop and run functional, performance, stress, corner-case, and reliability validation across voltage, temperature, and frequency.\nCharacterize bandwidth, latency, eye/margin, jitter, BER/error rates, and subsystem stability under real workloads.\nPerform hands-on measurements using lab equipment including:Real-time and sampling oscilloscopes (eye diagrams, jitter, clock/data analysis)\nVector Network Analyzer (VNA) for impedance, S-parameters, and channel characterization\nBERT (Bit Error Rate Tester) and protocol/compliance tools where applicable\nPower supplies, logic analyzers, thermal chambers, and related bench equipment\n\nCorrelate lab measurements with silicon behavior; drive root-cause analysis from analog/signal-quality observations to firmware/silicon fixes.\nSupport JEDEC compliance and interoperability testing for DDR/LPDDR families and HBM-related validation flows.\nPartner with hardware teams on EVB/validation board design, stack-up, routing, termination, power delivery, and debug access (probes, headers, rework).\nProvide feedback on SI/PI, connector/DRAM placement, reference designs, and design-for-validation (DFV) features.\nSupport board bring-up, BOM review, and hardware rework/debug during validation cycles.\nDesign and maintain Python/C-based automation for test execution, instrument control, data capture, sweeps, regression, and reporting.\nImprove lab efficiency through scripted instrument setups, automated pass/fail criteria, and dashboards for engineering and program reviews.\nInfluence validation methodology, coverage metrics, and infrastructure for future silicon generations.\nThe Impact You Will Have\n Your validation work directly determines whether Synopsys memory IP is ready to ship, affecting product timelines and customer confidence across the semiconductor industry\nThe test automation you build scales across multiple IP products and releases, reducing validation cycle time and increasing coverage\nYour characterization reports become the technical foundation for customer engagements, sales collateral, and internal design reviews\nDebug rigor you bring to silicon issues prevents costly respins and field failures, protecting both schedule and reputation\nTest methodologies you develop and standardize become the playbook for future validation engineers joining the Nepean lab\nCustomer issues you resolve keep high-stakes programs moving, often under tight timelines where your responsiveness is the difference between a delay and a win\nThe data you collect and analyze feeds back into design improvements, tightening the loop between silicon and specification\nWhat You'll Need\nBachelor's or master's degree in electrical engineering or computer engineering\n5+ years of hands-on experience in silicon or hardware validation, with deep focus on DDR and/or LPDDR and/or HBM PHY bring-up and characterization.\nStrong understanding of DRAM architecture, memory controller/PHY interaction, JEDEC standards, and training/calibration flows.\nProven experience with board bring-up and practical knowledge of PCB design considerations for high-speed memory (routing, impedance control, power integrity, probing).\nExpert-level use of lab equipment: oscilloscopes, VNA, BERT or equivalent high-speed measurement tools; ability to translate measurements into actionable debug.\nStrong programming skills in Python and/or C for test automation, instrument control, logging, and data analysis.\nExcellent analytical, communication, and cross-functional collaboration skills.\nGood to have:\nExperience with DDR5, LPDDR5/5X, HBM2e/HBM3 and associated compliance/margining methodologies.\nFamiliarity with SI/PI simulation (e.g., channel models) and correlation to lab results.\nExperience with embedded firmware/BIOS, JTAG/trace, and low-level debug on SoC/ASIC platforms.\nBackground in AI/accelerator, datacenter, or high-performance SoC memory subsystems.\nExperience building validation regression environments and CI-friendly hardware test flows.\nWho You Are\nYou can walk into a lab with a failing test case and walk out two hours later with a root cause and a plan, not just a theory\nWhen data does not make sense, you do not move on, you dig deeper until it does, even if that means questioning the test setup or the spec itself\nYou are comfortable presenting technical results to design teams, customers, and leadership, translating measurement data into clear conclusions without losing the nuance\nYou manage multiple validation streams at once, keeping track of what is blocked, what is running, and what needs attention next without dropping threads\nYou do not wait for perfect documentation or a fully defined test plan, you work with what you have, ask the right questions, and start collecting data\nYou care about the details, probe placement, grounding, signal integrity, calibration, because you know those details are what separate good data from noise\nThe Team You'll Be Part Of\nYou will join the growing Nepean lab team focused on validating Synopsys' memory interface IP portfolio. This is a hands-on lab environment where you will work closely with firmware and design groups to bring new IP from silicon bring-up through production release. The team operates at the intersection of design intent and real-world silicon behavior, and your work will directly inform product readiness and customer deployments.\n\nRewards and Benefits\nWe offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.\nSynopsys Canada ULC values the diversity of our workforce. We are committed to provide access & opportunity to individuals with disabilities and will provide reasonable accommodation to individuals throughout the recruitment and employment process. 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