{"id":1311241,"url":"https://alion.io/job/synopsys-soc-engineer-physical-design","title":"Soc Engineer (Physical Design)","company":{"id":39954,"name":"Synopsys","domain":"synopsys.com","url":"https://alion.io/company/synopsys-inc","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Avature","truth_index":{"grade":"A","score":100,"open_postings":96,"ghost_share":0.031,"stale_share":0,"repost_share":0.156,"time_to_fill_p50_days":7,"computed_at":"2026-10-01T05:45:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Ho Chi Minh City, Vietnam"],"countries":["VN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":18000,"max_usd":42000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":1198},"experience_years_min":5,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Ansys RedHawk","optional":false},{"name":"Synopsys Fusion Compiler","optional":false},{"name":"Synopsys StarRC","optional":false},{"name":"Verilog","optional":false}],"status":"live","first_seen_at":"2026-09-26T16:23:53Z","employer_posted_date":"2026-09-26","last_verified_at":"2026-10-01T10:46:24Z","board_verified":true,"closed_at":null,"days_open":4,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":4},"description":"Job Description and Requirements\nWe Are:\nAt Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.\nYou Are:\nYou are a seasoned SOC Engineering professional with a passion for innovation and problem-solving. With a strong background in Electronics Engineering, Electromechanics, or Telecommunications, you bring hands-on experience in Place & Route domains using advanced tools like Fusion Compiler/ICC2. You have a keen understanding of P&R, extraction, timing, IREM, and Physical Verification fundamentals. Your proficiency in scripting languages such as TCL and PERL, combined with your ability to guide and mentor junior team members, sets you apart. You thrive in collaborative environments, working closely with cross-functional teams including Business Units and Sales, to develop and deploy cutting-edge tool and IP solutions. Your excellent communication skills enable you to articulate complex technical concepts effectively in English.\nWhat You’ll Be Doing\nDeveloping and implementing SOC design using Synopsys EDA tools and IP, covering all stages from Verilog to GDS.\nContributing to both turnkey projects and serving as a trusted advisor to customer design and CAD teams.\nInnovating solutions to problems independently, with occasional guidance.\nSetting task-level goals and consistently meeting schedules.\nCollaborating with other Synopsys teams, including BU AE and Sales, to broaden and deploy tool and IP solutions.\nProviding technical guidance and mentorship to junior team members\nThe Impact You Will Have\nEnhancing the efficiency and effectiveness of SOC design processes.\nDriving innovation in chip design and verification methodologies.\nEnsuring the successful deployment of Synopsys' EDA tools and IP solutions.\nImproving customer satisfaction through expert advisory and technical support.\nContributing to the development of high-performance silicon chips and software content.\nSupporting the continuous technological advancements at Synopsys\nWhat You’ll Need:\nBS/MS/PhD in Electronics Engineering, Electromechanics, or Telecommunications.\n5 to 10 years of hands-on experience in Place & Route domains using Fusion Compiler/ICC2 tool.\nStrong debugging skills and a good understanding of P&R, extraction, timing, IREM, and Physical Verification fundamentals.\nExperience with signoff tools like PT, Redhawk, StarRC, ICV is an advantage.\nProficiency in TCL/PERL scripting.\nWho You Are:\nInnovative problem solver with the ability to work independently and as part of a team.\nEffective communicator with strong English language skills.\nMentor and leader capable of guiding junior team members.\nCollaborative team player who can work with cross-functional teams.\nDetail-oriented professional with a focus on meeting schedules and goals.\nThe Team You’ll Be A Part Of:\nYou will be an integral part of our SOC Engineering team, which focuses on developing and implementing advanced SOC designs using Synopsys EDA tools and IP. The team collaborates closely with other Synopsys teams, including Business Units and Sales, to deliver innovative solutions that drive the future of technology.\nAt Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.","description_format":"text","description_chars":3736,"description_truncated":false,"requirements":{"experience_years_min":5,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[{"language":"English","level":"All levels","optional":false}]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Incident Response","EDA Software","Application Security","Semiconductor IP & Chip Design Services"],"lifecycle":[{"event":"open","at":"2026-09-26T16:23:53Z"}],"liveness":{"score":71,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.787,"p_room":0.9,"age_days":4,"expected_fill_days":7,"reasons":["conf:20","velocity","win:mid","comp:brand"],"computed_at":"2026-10-01T05:45:00Z"},"pay":null,"html_url":"https://alion.io/job/synopsys-soc-engineer-physical-design","json_url":"https://alion.io/job/synopsys-soc-engineer-physical-design.json","meta":{"generated_at":"2026-10-01T13:03:16Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","usage":{"tier":"crawler","counted_by":"address","units_charged":1,"used_today":4599,"day_limit":5000,"remaining_today":401,"minute_limit":60,"resets_at":"2026-10-02T00:00:00Z"}}}