{"id":4053150,"url":"https://alion.io/job/synopsys-soc-engineering-executive-director-19125","title":"SOC Engineering, Executive Director-19125","company":{"id":39954,"name":"Synopsys","domain":"synopsys.com","url":"https://alion.io/company/synopsys-inc","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Avature","truth_index":{"grade":"A","score":99,"open_postings":60,"ghost_share":0.05,"stale_share":0,"repost_share":0.183,"time_to_fill_p50_days":18,"computed_at":"2026-11-11T05:49:22Z"}},"role":"Leadership","role_family":"Leadership","seniority":"head","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Sunnyvale, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":null,"experience_years_min":20,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"HPC","optional":false},{"name":"Synopsys Fusion Compiler","optional":false}],"status":"live","first_seen_at":"2026-11-11T02:57:36Z","employer_posted_date":"2026-11-11","last_verified_at":"2026-11-11T12:17:35Z","board_verified":true,"closed_at":null,"days_open":0,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":0},"description":"Job Description and Requirements\nExecutive Director, SoC Physical Design\nWe Are\nAt Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence-from self-driving cars and artificial intelligence to cloud computing, 5G, high-performance computing, and the Internet of Things. We lead in chip design, verification, and IP integration, enabling customers to create advanced, high-performance silicon.\nThe Systems Solutions Group (SSG) delivers architecture, design creation, verification, physical implementation, tools, methodologies, and IP expertise to help leading customers complete their most challenging SoC projects. Our work spans complex IP and subsystems through full turnkey, end-to-end SoCs across markets including high-performance computing, consumer, automotive, aerospace and defense, and AI.\nWithin our HPC controller portfolio, rapidly evolving standards and increasing I/O speeds demand new architectures and increasingly sophisticated physical implementation strategies. Physical design feasibility must be an integral part of product development and production-quality sign-off to ensure our soft IP can be successfully mapped to advanced ASIC technologies and delivers an exceptional customer experience.\nThe Role\nWe are seeking an Executive Director, SoC Physical Design to provide strategic, technical, and organizational leadership for physical design and implementation across complex SoCs, subsystems, and HPC controller IP. This is a hands-on executive leadership role combining deep physical design expertise with team leadership, customer engagement, program execution, methodology development, and cross-functional influence.\nYou will build, grow, and lead a multi-site physical design organization and be accountable for physical feasibility, implementation readiness, and design closure across a broad configuration space. You will partner closely with architects, RTL designers, verification teams, methodology and EDA teams, business-unit application engineers, Sales, and customers to translate requirements into executable plans and high-quality silicon-ready solutions.\nYou will also drive continuous improvements in design architecture, constraints, flows, tools, and methodology to improve power, performance, area, turnaround time, and overall implementation quality.\nWhat You’ll Be Doing\nBuild, grow, manage, and lead a cohesive, high-performing physical design organization across multiple sites and customer engagements.\nOwn physical design strategy, planning, execution, and sign-off for complex SoCs, subsystems, IP, and HPC controller products.\nBe accountable for physical feasibility and implementation readiness of soft IP releases, with practical P&R validation across representative configurations and technology targets.\nLead end-to-end physical implementation, including floor planning, hierarchical design, placement, clock tree synthesis, routing, timing closure, power optimization, physical verification, and tape-out readiness.\nEstablish scalable physical design flows, methodology, quality standards, and sign-off criteria across the product configuration space.\nDrive timing closure, power optimization, congestion resolution, constraint quality, and implementation efficiency using Synopsys tool flows such as Fusion Compiler.\nPartner with architecture and RTL design teams to identify structural and design improvements required for physical success, providing clear and actionable technical direction.\nCollaborate with verification, pre-silicon, post-silicon, and emulation teams to ensure implementation requirements and design tradeoffs are addressed throughout the development lifecycle.\nWork directly with customers to understand requirements, define scope, assess feasibility, estimate effort, cost, schedule, and design complexity, and support implementation on their selected technology nodes.\nSupport customers with floorplan development, P&R execution, design closure, and adoption of Synopsys tools, methodologies, and IP.\nDevelop and maintain consistent physical implementation user guides for each product vertical, including constraints, recommended flows, methodology, and sign-off guidance.\nInterface with methodology, EDA tooling, application engineering, and product teams to drive improvements in tools, flows, automation, and engineering productivity.\nReview implementation results, reports, metrics, and deliverables; provide continuous feedback and corrective direction to improve quality and execution.\nReport program status, risks, dependencies, and recommendations to senior leadership, proactively resolving issues that could affect delivery.\nMentor technical leaders and engineers, strengthen organizational capabilities, and establish a culture of technical excellence, accountability, collaboration, and continuous improvement.\nPartner with other Synopsys teams, including business-unit AEs and Sales, to broaden and deploy differentiated tool and IP solutions for customers.\nEnsure adherence to engineering quality standards, processes, and best practices across the organization.\nThe Impact You Will Have\nEnsure complex SoC and soft IP releases are physically feasible, implementation-ready, and capable of meeting demanding power, performance, area, quality, and schedule targets.\nImprove design readiness and physical implementation success across advanced ASIC technology nodes.\nIncrease the quality and consistency of delivered constraints, implementation guidance, and sign-off criteria.\nImprove customer experience and success in floor planning, P&R, and design closure of Synopsys IP and SoC solutions.\nDrive architecture and RTL improvements based on real implementation data and physical design insight.\nIncrease engineering productivity through scalable flows, automation, methodology, and stronger collaboration across design and implementation teams.\nBuild a strong culture of ownership, teamwork, technical rigor, and predictable execution.\nProvide actionable technical and program insights that enable effective executive decision-making.\nWhat You’ll Need\nBS/MS in Electronics, Electrical Engineering, or a related discipline, with extensive experience in ASIC/SoC development and physical design; approximately 20+ years of relevant semiconductor experience is preferred for this executive-level role.\nDeep expertise in physical design with a proven track record of hardening complex designs through tape-out readiness.\nExtensive hands-on knowledge of floor planning, placement, clock tree synthesis, routing, static timing analysis and timing closure, power optimization, hierarchical implementation, constraints, and physical sign-off.\nStrong experience with Synopsys physical implementation tool flows, including Fusion Compiler, or equivalent advanced-node implementation platforms.\nStrong understanding of ASIC development flows, SoC architecture, RTL design considerations, verification dependencies, and the stakeholders involved in successful silicon delivery.\nDemonstrated ability to evaluate physical feasibility and guide architecture and RTL teams toward implementation-friendly designs.\nExperience developing scalable flows, sign-off methodology, production-quality checks, and physical implementation guidance across multiple product configurations and technology nodes.\nProven experience leading large, geographically distributed engineering teams and developing senior technical talent.\nStrong program and operational management experience, including planning, resource management, schedule ownership, risk management, and delivery across multiple concurrent programs.\nExperience working directly with customers on complex implementation challenges and supporting deployment across customer-selected technology nodes.\nExperience in one or more relevant markets such as high-performance computing, AI, automotive, consumer, aerospace and defense, or other advanced SoC domains.\nExcellent analytical, problem-solving, communication, presentation, and executive-influence skills.\nWho You Are\nA strategic and technically credible leader who can operate effectively from executive-level planning through detailed engineering problem solving.\nProactive, adaptable, resilient, and strongly results oriented.\nA collaborative leader who communicates with influence and creates accountability across organizational boundaries.\nCustomer focused, with the judgment to balance technical quality, schedule, business priorities, and long-term product success.\nPassionate about developing people, improving engineering systems, and building teams that consistently deliver high-quality results.\nThe Team You’ll Be A Part Of\nYou will be part of a high-impact SoC and High-Performance Compute leadership organization focused on delivering complex IP and system solutions to the marketplace. You will lead a horizontal physical design organization supporting multiple product verticals and customer engagements, with team members embedded across programs while operating under a consistent strategy, methodology, and quality framework.\nAt Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.\nIn addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. The base salary range for this role is across the U.S.","description_format":"text","description_chars":9925,"description_truncated":false,"requirements":{"experience_years_min":20,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":["Equity"],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Incident Response","EDA Software","Simulation & Digital Twin Software","Semiconductor IP & Chip Design Services"],"lifecycle":[{"event":"open","at":"2026-11-11T02:57:36Z"}],"visa":[{"country":"US","licensed_sponsor":true,"adverts_offering_sponsorship_24m":0,"sanctioned_now":false,"evidence":"H-1B filings in 12 months: 178 · green card filings: 177","filings_12m":178,"filings_prev_12m":208,"green_card_filings_12m":177,"median_offered_wage_usd":157472,"route":null,"cap_exempt":false,"checked_at":"2026-11-11T07:38:50+00:00","sources":["US Department of Labor: LCA disclosure data (H-1B, H-1B1, E-3)","US Department of Labor: PERM disclosure data (green cards)"],"filings_for_role_12m":9}],"liveness":{"score":86,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.86,"p_room":1,"age_days":0,"expected_fill_days":18,"reasons":["conf:2","win:early","comp:brand"],"computed_at":"2026-11-11T05:49:22Z"},"pay":null,"html_url":"https://alion.io/job/synopsys-soc-engineering-executive-director-19125","json_url":"https://alion.io/job/synopsys-soc-engineering-executive-director-19125.json","meta":{"generated_at":"2026-11-11T15:58:37Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":29966,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-11-12T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.1,"usd":0.01,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":39954},"rest":"https://alion.io/mcp/rest/get_company?id=39954"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fsynopsys-soc-engineering-executive-director-19125"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":2,"usd":0.2},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fsynopsys-soc-engineering-executive-director-19125"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.1,"usd":0.01},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fsynopsys-soc-engineering-executive-director-19125"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/synopsys-soc-engineering-executive-director-19125\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fsynopsys-soc-engineering-executive-director-19125"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":4053150}},{"tool":"search_jobs","arguments":{"company":"synopsys.com","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":4053150},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); https://alion.io/mcp with an Alion account has everything. Docs: https://alion.io/developers"}}