{"id":475641,"url":"https://alion.io/job/teledyne-flir-staff-logic-design-engineer","title":"Staff Logic Design Engineer","company":{"id":176498,"name":"Teledyne FLIR","domain":"flir.com","url":"https://alion.io/company/teledyne-flir","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"A","score":87,"open_postings":78,"ghost_share":0,"stale_share":0.513,"repost_share":0,"time_to_fill_p50_days":53,"computed_at":"2026-11-01T06:10:25Z"}},"role":"Hardware","role_family":"Hardware","seniority":"staff","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Milpitas, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":141900,"max":null,"currency":"USD","period":"year","gross":null,"usd_annual":141900},"salary_estimate":null,"experience_years_min":7,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"SystemVerilog","optional":false},{"name":"UVM","optional":false},{"name":"Verilog","optional":false},{"name":"Python","optional":true},{"name":"Siemens ModelSim","optional":true},{"name":"Xilinx Vivado","optional":true}],"status":"live","first_seen_at":"2025-11-17T00:00:00Z","employer_posted_date":"2025-11-17","last_verified_at":"2026-11-01T17:53:22Z","board_verified":true,"closed_at":null,"days_open":350,"trust":{"level":"stale","repost_count":0,"flags":["stale"],"days_open":349},"description":"Be visionary\nTeledyne Technologies Incorporated provides enabling technologies for industrial growth markets that require advanced technology and high reliability. These markets include aerospace and defense, factory automation, air and water quality environmental monitoring, electronics design and development, oceanographic research, deepwater oil and gas exploration and production, medical imaging and pharmaceutical research.\nWe are looking for individuals who thrive on making an impact and want the excitement of being on a team that wins.\nJob Description\nAbout Teledyne LeCroy\nTeledyne LeCroy is a global leader in protocol analysis and test solutions for high-speed serial data communications. Our high-speed protocol analyzers are trusted by top-tier semiconductor and system companies to validate and debug cutting-edge technologies in data centers, AI/ML, storage, and networking.\nRole Overview\nWe are looking for a top-notch Staff Logic Design engineer who has the right composition of knowledge, experience, team play, spirit and drive, to join a dynamic team that develops leading edge test and measurement products. Join our high-speed Protocol Team as a Staff Logic Design Engineer, where you'll architect and implement high-performance digital logic for protocol capture, analysis, and emulation. You’ll work on FPGA-based systems that decode and analyze High speed protocols (PCIe, USB, Ethernet etc.) in real time, collaborating with cross-functional teams to deliver industry-leading solutions.\nKey Responsibilities\n RTL Design & MicroarchitectureDevelop synthesizable RTL (Verilog/SystemVerilog) for high-speed protocol, packet parsing, timestamping, and buffer management.\nDesign high-throughput data paths and control logic optimized for latency, bandwidth, and resource efficiency.\n\n FPGA DevelopmentTarget high-end FPGAs (Xilinx Versal, Intel Agilex); perform synthesis, P&R, timing closure, and resource optimization.\nIntegrate PCIe IP cores, DMA engines, and custom protocol decoders.\n\nVerification & DebugBuild SystemVerilog/UVM testbenches for block and system-level verification.\nConduct simulation, waveform analysis, and functional coverage to ensure robust design.\n\n System IntegrationCollaborate with hardware, firmware, and software teams to bring up and validate protocol analyzer platforms.\nSupport lab debug using logic analyzers, oscilloscopes, and in-system FPGA tools (ILA/SignalTap).\n\nDocumentation & ProcessCreate design specifications, interface documents, and verification plans.\nParticipate in design/code reviews and contribute to continuous improvement of design practices.\n\nRequired Qualifications\nBS in EE, CS or Computer Engineering required\nMS in EE is a plus\n7+ years of experience in digital logic design for FPGA or ASIC.\nStrong proficiency in Verilog/SystemVerilog RTL design.\nExperience with one or more of the following protocols: PCIe, CXL, NVMe, USB, SAS, SATA\nExperience with Monitoring and/or Test & Measurement tools\nExperience with PCIe protocol (Gen4/Gen5/Gen6) and familiarity with TLP/DLLP/PHY layer concepts.\nHands-on with FPGA toolchains (Vivado, Quartus, etc.) and timing closure.\nKnowledge of UVM, assertions, and simulation/debug tools (e.g., ModelSim, Vivado Simulator).\nSolid understanding of CDC, clock domain design, and reset strategies.\nPreferred Qualifications\nExperience with protocol analyzers, packet capture, and timestamping logic.\nFamiliarity with AXI interconnects, memory controllers, and high-speed buffering.\nExposure to SERDES, PCIe IP integration, and link training/debug.\nScripting experience (Python, Tcl) for automation and test infrastructure.\nExperience with hardware/software co-design, register maps, and embedded firmware interaction.\nPrior work in test & measurement or semiconductor validation environments.\nWork Environment\nLocation: Milpitas, CA\n Travel: Minimal (Team Culture: Collaborative, fast-paced, and innovation-driven\nSalary Range:\n$141,900.00-$189,200.000Pay Transparency\nThe anticipated salary range listed for this role is only an estimate. Actual compensation for successful candidates is carefully determined based on several factors including, but not limited to, location, education/training, work experience, key skills, and type of position.\nTeledyne and all of our employees are committed to conducting business with the highest ethical standards. We require all employees to comply with all applicable laws, regulations, rules and regulatory orders. Our reputation for honesty, integrity and high ethics is as important to us as our reputation for making innovative sensing solutions.\nTeledyne is an Equal Opportunity/AffirmativeAction Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability or veteran status, age, or any other characteristic or non-merit based factor made unlawful by federal, state, or local laws.","description_format":"text","description_chars":4974,"description_truncated":false,"requirements":{"experience_years_min":7,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["C4ISR","Defense Manufacturing","Video Surveillance","Machine Vision & 3D Cameras"],"lifecycle":[{"event":"open","at":"2026-09-06T14:31:04Z"}],"visa":[],"liveness":{"score":9,"band":"cold","label":"Long shot","p_open":1,"p_active":0.333,"p_room":0.28,"age_days":349,"expected_fill_days":53,"reasons":["conf:11","stale_co","velocity","win:tail","crowd:brand"],"computed_at":"2026-11-01T06:10:25Z"},"pay":{"stated_usd_annual":141900,"is_top_pay":false},"html_url":"https://alion.io/job/teledyne-flir-staff-logic-design-engineer","json_url":"https://alion.io/job/teledyne-flir-staff-logic-design-engineer.json","meta":{"generated_at":"2026-11-02T02:19:40Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":3435,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-11-03T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":176498},"rest":"https://alion.io/mcp/rest/get_company?id=176498"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fteledyne-flir-staff-logic-design-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fteledyne-flir-staff-logic-design-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fteledyne-flir-staff-logic-design-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/teledyne-flir-staff-logic-design-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fteledyne-flir-staff-logic-design-engineer"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":475641}},{"tool":"search_jobs","arguments":{"company":"flir.com","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":475641},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); https://alion.io/mcp with an Alion account has everything. Docs: https://alion.io/developers"}}