{"id":128263,"url":"https://alion.io/job/tenstorrent-sr-engineer-rtl-implementation","title":"Sr. Staff Engineer, RTL Physical Implementation Lead","company":{"id":48241,"name":"Tenstorrent","domain":"tenstorrent.com","url":"https://alion.io/company/tenstorrent","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Greenhouse","truth_index":{"grade":"A","score":86,"open_postings":76,"ghost_share":0,"stale_share":0.355,"repost_share":0,"time_to_fill_p50_days":75,"computed_at":"2026-10-23T05:54:15Z"}},"role":"Hardware","role_family":"Hardware","seniority":"lead","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"explicit","locations":["Austin, United States","Santa Clara, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":100000,"max":500000,"currency":"USD","period":"year","gross":null,"usd_annual":500000},"salary_estimate":null,"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Verilog","optional":false},{"name":"VHDL","optional":false}],"status":"live","first_seen_at":"2026-05-22T17:39:59Z","employer_posted_date":"2026-09-24","last_verified_at":"2026-10-23T14:47:35Z","board_verified":true,"closed_at":null,"days_open":154,"trust":{"level":"ok","repost_count":0,"flags":[],"days_open":153},"description":"Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.\nWe are looking for a talented engineer to join our CPU design team and lead the front-end RTL physical implementation team. Drive CAD flows on multiple process technologies while working closely with core micro-architects to refine CPU core configurations and optimizing PPA. You’ll work on a CPU based on RISC-V ISA, collaborating with DV, PD, RTL and performance teams to deliver a functional, timing, and power-converged design.\nThis role is hybrid, based out of Austin, TX or Santa Clara, CA.\nWe welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.\nWho You Are\nAn expert in physical design practices used to optimize PPA\nExperienced in high-performance physical design.\nProficient in RTL coding (Verilog/VHDL) and familiar with industry-standard tools for simulation and power analysis.\nSkilled in synthesis, place and route tools including flows and physical design methodology.\nBackground in CPU micro-architecture.\nWhat We Need\nOwn front-end physical implementation and PPA definition for a high-performance RISC-V CPU and CPU subsystem \nWork closely with microarchitects and RTL designers to “make the IP better” by optimizing frequency, power, and area across process nodes\nDefine initial floorplans and early area, power, and frequency estimates for key CPU and subsystem configurations\nPartner with the broader PD organization and PD leads to improve and standardize methodologies, flows, and customer collateral for CPU, subsystem, and system IPs, acting as a “PD for IP” specialist bridging PD and design teams\nUse innovative techniques to optimize power, performance, and area while driving physical design experiments and evaluating results.\nSummarize and communicate PPA trade-offs and recommendations to the broader RISC-V and PD teams\nWhat You Will Learn\nDevelop and lead a high performance physical design team tailored to solving difficult and unique problems to generate leading IP solutions\nEnd-to-end exposure to CPU design from microarchitecture through timing and power convergence.\nHands-on experience optimizing CPU designs and driving PPA improvement.\nIntegration of open-source and industry-standard tools to improve physical flows and results.\nWork in a deeply technical, highly collaborative team solving cutting-edge CPU design challenges.\nCompensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.\nTenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.\nThis offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.","description_format":"text","description_chars":4305,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[{"name":"United States","iso":"US","kind":"country"}],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips","AI Chips & Accelerators","Semiconductor IP & Chip Design Services"],"lifecycle":[{"event":"open","at":"2026-05-22T17:39:59Z"}],"visa":[{"country":"US","licensed_sponsor":true,"evidence":"H-1B filings in 12 months: 58 · green card filings: 4","filings_12m":58,"filings_prev_12m":53,"green_card_filings_12m":4,"median_offered_wage_usd":176210,"route":null,"cap_exempt":false,"checked_at":"2026-10-15T11:24:14+00:00","sources":["US Department of Labor: LCA disclosure data (H-1B, H-1B1, E-3)","US Department of Labor: PERM disclosure data (green cards)"],"filings_for_role_12m":45}],"liveness":{"score":18,"band":"cold","label":"Long shot","p_open":1,"p_active":0.651,"p_room":0.28,"age_days":153,"expected_fill_days":75,"reasons":["conf:1","velocity","win:tail","crowd:brand"],"computed_at":"2026-10-23T05:54:15Z"},"pay":{"stated_usd_annual":500000,"is_top_pay":true},"html_url":"https://alion.io/job/tenstorrent-sr-engineer-rtl-implementation","json_url":"https://alion.io/job/tenstorrent-sr-engineer-rtl-implementation.json","meta":{"generated_at":"2026-10-23T18:03:31Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":27486,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-24T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":48241},"rest":"https://alion.io/mcp/rest/get_company?id=48241"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Ftenstorrent-sr-engineer-rtl-implementation"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Ftenstorrent-sr-engineer-rtl-implementation"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Ftenstorrent-sr-engineer-rtl-implementation"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/tenstorrent-sr-engineer-rtl-implementation\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Ftenstorrent-sr-engineer-rtl-implementation"}]}