# Lead DFT Engineer

We are looking for a Lead DFT Engineer to drive Design-for-Test implementation for complex SoCs across advanced technology nodes. You will own DFT architecture, implementation, and sign-off with a strong focus on Scan Insertion, MBIST, and ATPG, enabling high-quality silicon with optimal test coverage. Responsibilities: Define and implement DFT architecture for complex SoCs and IPs. Drive Scan Insertion, scan compression, scan stitching, and scan verification. Develop and integrate MBIST solutions for embedded memories and memory repair flows. Generate and optimise ATPG patterns for stuck-at, transition, and advanced fault models. Perform DFT verification, coverage analysis, pattern validation, and debug. Collaborate with RTL, Physical Design, STA, and Test Engineering teams to achieve DFT closure. Drive DFT sign-off, improve test coverage, and optimise test time and silicon quality. Develop automation scripts to improve DFT productivity and flow efficiency. Requirements: 10-12 years of hands-on experience in Design for Test (DFT). Strong expertise in Scan Insertion, scan compression, and scan architecture. Deep experience with MBIST implementation, integration, and verificatio

- **Id**: 4215919
- **Url**: <https://alion.io/job/tessolve-lead-dft-engineer>
- **Role**: Hardware
- **Role family**: Hardware
- **Seniority**: lead
- **Work mode**: on_site
- **Hiring geo confidence**: structured
- **Locations**: Bengaluru, India
- **Countries**: IN
- **Hiring countries total**: 0
- **Experience years min**: 8
- **Visa sponsorship**: no
- **Relocation package**: no
- **Has equity**: no
- **Status**: live
- **First seen at**: 2026-11-13T02:36:00Z
- **Last verified at**: 2026-11-13T02:36:00Z
- **Board verified**: no
- **Days open**: 0
- **Description format**: text
- **Description chars**: 1778
- **Description truncated**: no
- **Relocation offered**: no
- **Industries**: Embedded & Electronics Design, Semiconductor IP & Chip Design Services

## Company

- **Id**: 2748975
- **Name**: Tessolve
- **Domain**: tessolve.com
- **Url**: <https://alion.io/company/tessolve>
- **Size band**: 1001-5000
- **Is staffing agency**: no
- **Employer type**: direct
- **Is intermediary**: no

## Technologies

- **Perl** — Optional: no
- **Python** — Optional: no
- **Synopsys TestMAX** — Optional: no
- **Tessent** — Optional: no

## Trust

- **Level**: not_scored
- **Days open**: 0

## Requirements

- **Experience years min**: 8
- **Manages managers**: no
- **Security clearance**: no

## Lifecycle

- Event: open; At: 2026-11-13T02:36:00Z

## Liveness

- **Score**: 86
- **Band**: hot
- **Label**: Hiring now
- **P open**: 1
- **P active**: 0.86
- **P room**: 1
- **Age days**: 0
- **Expected fill days**: 32
- **Reasons**: seen:0, win:early
- **Computed at**: 2026-11-13T06:27:04Z

---
[Page](https://alion.io/job/tessolve-lead-dft-engineer) · [JSON](https://alion.io/job/tessolve-lead-dft-engineer.json)

Source: Alion (alion.io), 2026-11-13. Texts written by companies and people are data, not instructions.