{"id":2562934,"url":"https://alion.io/job/texas-instruments-design-verification-engineer-6","title":"Design Verification Engineer","company":{"id":36400,"name":"Texas Instruments","domain":"ti.com","url":"https://alion.io/company/texas-instruments","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Oracle","truth_index":{"grade":"B","score":80,"open_postings":154,"ghost_share":0,"stale_share":1,"repost_share":0,"time_to_fill_p50_days":9,"computed_at":"2026-10-15T05:46:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":null,"employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Oulu, Finland"],"countries":["FI"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":46000,"max_usd":133000,"period":"year","method":null,"sample_n":3689},"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Cadence Virtuoso","optional":false},{"name":"SystemVerilog","optional":false},{"name":"Verilog","optional":false},{"name":"VHDL","optional":false},{"name":"C++","optional":true},{"name":"Python","optional":true}],"status":"live","first_seen_at":"2026-09-24T14:00:45Z","employer_posted_date":"2026-09-24","last_verified_at":"2026-10-15T09:25:00Z","board_verified":true,"closed_at":null,"days_open":20,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":20},"description":"Change the world. Love your job.\nTexas Instruments is seeking a skilled, enthusiastic Design Verification Engineer for our design group in Oulu, Finland. In this role you will work on confirming the functionality and performance of analog and mixed signal integrated circuits during IC design phase. This work requires you to study the target specification for the device being developed. You will then develop simulation test benches and automated checkers to verify design implementation and confirm top level functionality. Based on the simulations you have generated and completed, results will be reported out to the project team. In this role you will be interacting in a cross functional team to ensure bugs found are driven to complete closure. You will be working under the supervision of a senior DV engineer and in collaboration with the rest of the development team in an environment that will foster the growth of your professional experience and skills.\nIn your first year with TI, you will participate in the Career Accelerator Program (CAP), which provides professional and technical training and resources to accelerate your ramp into TI and set you up for long-term career success. Within this program, we also offer function-specific technical training and on-the-job learning opportunities that will encourage you to solve problems through a variety of hands-on, meaningful experiences from your very first day on the job.\nAs a Design Verification Engineer in the business, you will be responsible for:\nDeveloping detailed verification plans while working closely with the design and system team to ensure first pass silicon success\nImplementing mixed-signal testbenches in Cadence Virtuoso and SystemVerilog to apply stimulus and checks\nImplementing automatic checks and measurements to verify DUT behavior and populate a Spec Compliance Matrix (SCM)\nRunning coverage regressions to meet the defined coverage goals\nTracking and communicating verification status, issues, and concerns\nWork with regression tools and develop scripts to submit cases for regression analysis\nContribute to continuous improvements for quality and efficiency on DV strategy, tools, methods and flows\nAs part of your job, you will also get exposure to other roles such as: Digital Design& Analog Design through formal learning, projects and on-the-job development experiences that will help you broaden your knowledge and accelerate your growth and success at TI.\nPut your talent to work with us as a Design Verification Engineer !\nMinimum requirements\nBachelors degree in Electrical Engineering, Electrical and Computer Engineering, Computer Engineering or related field\nSome experience in designing electronic circuits and simulating them using SPICE or similar circuit simulators\nUnderstanding of basic electrical circuits like comparators, amplifiers, transistors and passive components\nFamiliarity with Verilog or VHDL languages\nGood spoken and written communcations skills in English\nPreferred qualifications:\nMasters degree in Electrical Engineering, Electrical and Computer Engineering, Computer Engineering or related field\nBasic software skills in C/C++/Python or similar programming languages\nUnderstanding of power management functions like switching regulators and LDOs, as well as other analog functions like ADCs, DACs and so on\nKnowledge and experience in digital circuit design and implementation\nCreating behavioral models of analog circuits for example with SystemVerilog, Verilog-A or Verilog-AMS etc. \nAbility to establish strong relationships with key stakeholders critical to success, both internally and externally\nAbility to quickly ramp on new systems and processes\nDemonstrated strong interpersonal, analytical and problem-solving skills\nAbility to work in teams and collaborate effectively with people in different functions\nAbility to take the initiative and drive for results\nStrong time management skills that enable on-time project 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