Technical Lead – FPGA Verification (SV-UVM & DO-254)

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Technical Lead - FPGA Verification (SV-UVM & DO-254)

Position Overview

The Thales India Engineering Competency Center (ECCi) is seeking a Hands-on Technical Lead for FPGA IVV. This is a dual-impact role: you will act as a player and a technical coach to elevate the team's skills while remaining directly involved in the execution of complex verification activities. You will be the driving force behind our transition to SV-UVM and the guarantor of DO-254 excellence.

Qualifications

Experience: 10+ years in FPGA/ASIC Verification.

Industry: Aerospace or Defense background would be an added advantage.

Education: B.Tech/B.E or M.Tech/Masters in Electronics & Communication

Required Skills:

Key Responsibilities:

1. Strategic Coaching & Mentorship

• Technical Guidance: Provide daily coaching to the engineering team on SV-UVM best practices and advanced debugging techniques.
• Skill Uplift: Adoption of latest tools, use of AI.
• Best Practices: Establish and maintain high-quality coding standards for SV-UVM and documentation for DO-254.

2. Operational Execution

• Environment Development: Directly architect and code critical UVM components (UVM agent, Scoreboards) and complex test scenarios.
• Complex Interfaces Validation: Experience in verification of communication interfaces and bus standards (Example: AXI4, SPI, PCIe, UART, ARINC 818/664 …)
• Problem Solving: Take the lead on the most challenging technical bottlenecks, from simulation mismatches to physical hardware-software integration issues.

3. Certification & Delivery (DO-254)

• End-to-End Ownership: Be accountable for the full verification cycle (DAL A/B), ensuring 100% traceability between requirements and test results.
• Artifact Production: Hands-on drafting and review of critical certification documents.
• Schedule & Risk: Lead technical estimation, planning, and risk mitigation for the IVV scope.

Critical Competencies

Expert SV-UVM (Active Practitioner): Current, hands-on experience in building UVM environments; not just managing them. Communication & Bus Protocols: Deep technical knowledge of AXI4, PCIe, and ARINC standards. Process Assurance: DO-254 (DAL A/B) or ISO 26262 (ASIL-D) or comparable safety standards Mentoring & Pedagogy: Ability to explain complex concepts clearly and upskill a team. Tool Mastery: Advanced user of Siemens-Questasim/Synopsys-VCS/Cadence-Xcelium/Rivera-PRO. Automation: Capable of developing Python/TCL scripts to optimize the verification flow. Project Stewardship: Ability to balance technical execution with planning and reporting.

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