{"id":2570163,"url":"https://alion.io/job/tylsemi-emulation-leadprincipal-engineer","title":"Emulation Lead/Principal Engineer","company":{"id":4380397,"name":"TYLsemi","domain":"tylsemi.ai","url":"https://alion.io/company/tylsemi","size_band":null,"is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Rippling","truth_index":{"grade":"A","score":95,"open_postings":14,"ghost_share":0,"stale_share":0,"repost_share":0,"time_to_fill_p50_days":136,"computed_at":"2026-10-17T05:46:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":"lead","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["San Jose, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":161000,"max_usd":306000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":576},"experience_years_min":10,"visa_sponsorship":false,"relocation_package":false,"has_equity":true,"technologies":[{"name":"HPC","optional":false},{"name":"C++","optional":true},{"name":"Cadence Palladium","optional":true},{"name":"Cadence Protium","optional":true},{"name":"CI/CD","optional":true},{"name":"OpenAI","optional":true},{"name":"Python","optional":true},{"name":"Siemens Veloce","optional":true},{"name":"Synopsys HAPS","optional":true},{"name":"Synopsys ZeBu","optional":true},{"name":"SystemVerilog","optional":true},{"name":"Verilog","optional":true}],"status":"live","first_seen_at":"2026-08-14T18:34:32Z","employer_posted_date":"2026-08-14","last_verified_at":"2026-10-17T15:28:30Z","board_verified":true,"closed_at":null,"days_open":63,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":63},"description":"About TYLsemi, Inc.\nThe Opportunity\nThe AI infrastructure market is exploding. Every hyperscaler, every cloud provider, every AI company is building custom silicon. But they all face the same problem: how do you connect hundreds of chips, deliver clean power at scale, and move terabits of data without melting the package?\nThat's what we solve. TYLsemi builds the chiplet infrastructure IP - the IO, power delivery, and interconnect building blocks - that makes AI/HPC systems actually work at scale.\nThis isn't a nice-to-have. It's the critical path.\nWhy Now\nThe Market Window\nThe semiconductor industry is going through its biggest architectural shift in 40 years:\nMoore's Law is dead. 2nm and beyond delivers marginal performance gains. The future is chiplets, not monolithic dies.\nCustom silicon is now mainstream. Google, Microsoft, Amazon, Meta, OpenAI - they're all designing their own ASICs. The $50B custom silicon market is growing 30% annually.\nIO and power are the bottleneck. Solve hard problems and provide something which is a category in itself.\nTranslation: We're entering the market at exactly the moment when every major AI/HPC player needs what we're building, and their alternatives are disappearing.\nCulture & Team: How We Work\nNo Politics, No Bureaucracy\nThere are no layers, no approval chains, no corporate theater.\nIf you have an idea, we test it. If it works, we ship it.\nNo endless meetings, no PowerPoint presentations to convince middle management.\nRemote-Friendly, Global Team\nUS team: Bay Area preferred, but we hire the best people regardless of location\nIndia team: Building a world-class design center in Bangalore\nMove Fast, Ship Real Products\nWe're not a research project. We have paying customers, committed capital, and aggressive timelines.\nThis is a company, not a lifestyle business. We're building to win.\nWhat We Value\nOwnership mindset. You're not here to execute someone else's roadmap. You're here to define it.\nBias for action. We move fast. Analysis paralysis doesn't fly here.\nDeep technical expertise. This is hard engineering. We need people who've shipped real silicon and debugged real hardware.\nLow ego, high standards. We don't care about titles or politics. We care about results.\nThe Ask\nIf you're reading this, you're probably comfortable. You have a good job at a stable company with all the benefits.\nWe're asking you to walk away from that and bet on us.\nHere's why you should:\nThe market is real. AI infrastructure spending is $200B+ annually and growing 40% YoY. Every hyperscaler needs what we're building.\nThe team has done this before. We've built and exited semiconductor companies at scale. This isn't our first rodeo.\nThe traction is de-risked. We have LOIs, strategic investors, and a clear path to revenue.\nThe work is consequential. You're not optimizing someone's ad click-through rate. You're building the silicon infrastructure that powers AI.\nThis is the bet. Join us and build something that matters.\nOr stay comfortable. No judgment.\nBut if you're the kind of person who wants to take the shot, we'd love to talk.\nREADY TO JOIN?\nRole Overview\nBuild the platform that brings silicon to life beforetapeout.\nTYLsemiis developingpurpose-built connectivitychipletforHPC/rack-scale AI systems. We are seekinga Principal EngineerEmulationLeadto create scalable pre-silicon environments that enable firmware, software, and system validation months before first silicon arrives.You'llbuild production-grade platforms that boot real software, run meaningful workloads, expose system bottlenecks, and accelerate product readiness across the organization.\nWhat You'll Do\nArchitect and deploy full-chip, multi-die, and subsystem emulation environments usingPalladium,ZeBu, Veloce, or similar platforms.\nEnable pre-silicon bring-up of boot ROM, firmware, drivers, operating systems, and application workloads.\nDevelopscalableemulationmethodologies and reusable infrastructure, \nDrive system-level validation, performance analysis, and root-cause debug across RTL, firmware, software, and verification.\nBuild automation, CI/CD workflows, regressions, and release processes that scale across engineering teams.\nPartner with architecture, design, verification, firmware, DFT, and post-silicon teams to reduce product risk beforetapeout.\nInfluencemethodology, observability,debugability, and overall silicon readiness.\nLead complex debug spanning RTL, firmware, software, and hardware platforms.\nMentor engineers and influence architecture to improve observability, diagnosability, and product quality.\nWhat We're Looking For\n10+ years of ASIC/SoCdevelopment experience with significantemulationownership.\nExpertisewith commercial emulation platforms (Palladium,ZeBu, or Veloce).\nStrong RTL skills in Verilog/SystemVerilog.\nExperience with firmware bring-up, embedded processors,interrupts, and system debug.\nProficiencyinC/C++ and scripting withPython.\nExcellent cross-functional debugging and technical leadership skills.\nProventrack recordleading complex verification and emulation programs.\nGood to Have\nEthernet, PCIe, CXL or high-speed interconnects.\nFPGA prototyping (Protium, HAPS, etc.).\nSecurity architectures, Root of Trust, and secureboot.\nFirst-silicon bring-up and system qualification experience.\nSuccess in This Role Looks Like\nThe emulation platform reliably boots target firmware/OS and runs representative workloads well ahead of tapeout, giving firmware and software teams real hardware behavior months earlier than post-silicon would allow.\nEmulation infrastructure (CI/CD, regressions, release process) is stable enough that other engineering teams can self-serve without heavy hand-holding.\nCross-functional debug cycles (RTL/firmware/software) shrink because observability and diagnosability were built into the platform, not bolted on after issues surface.\nDesign and firmware teams treat the emulation lead as a trusted escalation point for hard-to-reproduce, cross-domain bugs.\nCompensation\nThe compensation range shown below represents total target cash compensation and includes both base salary and target bonus. Actual compensation will vary based on factors such as experience, skills, qualifications, job level, and work location.\nIn addition to cash compensation, this position is eligible for equity in the form of stock options, giving you the opportunity to share in the Company’s long-term growth and success.","description_format":"text","description_chars":6409,"description_truncated":false,"requirements":{"experience_years_min":10,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":["Equity","Stock options"],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Design & Creative"],"lifecycle":[{"event":"open","at":"2026-10-14T22:44:48Z"}],"visa":[],"liveness":{"score":77,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.85,"p_room":0.9,"age_days":63,"expected_fill_days":136,"reasons":["conf:4","velocity","win:mid"],"computed_at":"2026-10-17T05:46:00Z"},"pay":null,"html_url":"https://alion.io/job/tylsemi-emulation-leadprincipal-engineer","json_url":"https://alion.io/job/tylsemi-emulation-leadprincipal-engineer.json","meta":{"generated_at":"2026-10-17T17:14:28Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":23735,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-18T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":4380397},"rest":"https://alion.io/mcp/rest/get_company?id=4380397"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Ftylsemi-emulation-leadprincipal-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Ftylsemi-emulation-leadprincipal-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Ftylsemi-emulation-leadprincipal-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/tylsemi-emulation-leadprincipal-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Ftylsemi-emulation-leadprincipal-engineer"}]}