{"id":2570178,"url":"https://alion.io/job/tylsemi-senior-cad-engineer","title":"Senior CAD Engineer","company":{"id":4380397,"name":"TYLsemi","domain":"tylsemi.ai","url":"https://alion.io/company/tylsemi","size_band":"501-1000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Rippling","truth_index":{"grade":"A","score":90,"open_postings":13,"ghost_share":0,"stale_share":0.385,"repost_share":0,"time_to_fill_p50_days":55,"computed_at":"2026-11-06T05:58:05Z"}},"role":"Industrial Engineering","role_family":"Industrial Engineering","seniority":"senior","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bengaluru, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":null,"experience_years_min":5,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"HPC","optional":false},{"name":"OpenAI","optional":true},{"name":"Perl","optional":true},{"name":"Python","optional":true}],"status":"live","first_seen_at":"2026-09-03T09:08:48Z","employer_posted_date":"2026-09-03","last_verified_at":"2026-11-06T13:19:29Z","board_verified":true,"closed_at":null,"days_open":64,"trust":{"level":"ok","repost_count":1,"flags":[],"days_open":63},"description":"About TylSemi, Inc.\nThe Opportunity\nThe AI infrastructure market is exploding. Every hyperscaler, every cloud provider, every AI company is building custom silicon. But they all face the same problem: how do you connect hundreds of chips, deliver clean power at scale, and move terabits of data without melting the package?\nThat's what we solve. TylSemi builds the chiplet infrastructure IP - the IO, power delivery, and interconnect building blocks - that makes AI/HPC systems actually work at scale.\nThis isn't a nice-to-have. It's the critical path.\nWhy Now\nThe Market Window\nThe semiconductor industry is going through its biggest architectural shift in 40 years:\nMoore's Law is dead. 2nm and beyond delivers marginal performance gains. The future is chiplets, not monolithic dies.\nCustom silicon is now mainstream. Google, Microsoft, Amazon, Meta, OpenAI - they're all designing their own ASICs. The $50B custom silicon market is growing 30% annually.\nIO and power are the bottleneck. Solve hard problems and provide something which is a category in itself.\nTranslation: We're entering the market at exactly the moment when every major AI/HPC player needs what we're building, and their alternatives are disappearing.\nCulture & Team: How We Work\nNo Politics, No Bureaucracy\nThere are no layers, no approval chains, no corporate theater.\nIf you have an idea, we test it. If it works, we ship it.\nNo endless meetings, no PowerPoint presentations to convince middle management.\nRemote-Friendly, Global Team\nUS team: Bay Area preferred, but we hire the best people regardless of location\nIndia team: Building a world-class design center in Bangalore\nMove Fast, Ship Real Products\nWe're not a research project. We have paying customers, committed capital, and aggressive timelines.\nThis is a company, not a lifestyle business. We're building to win.\nWhat We Value\nOwnership mindset. You're not here to execute someone else's roadmap. You're here to define it.\nBias for action. We move fast. Analysis paralysis doesn't fly here.\nDeep technical expertise. This is hard engineering. We need people who've shipped real silicon and debugged real hardware.\nLow ego, high standards. We don't care about titles or politics. We care about results.\nThe Ask\nIf you're reading this, you're probably comfortable. You have a good job at a stable company with all the benefits.\nWe're asking you to walk away from that and bet on us.\nHere's why you should:\nThe market is real. AI infrastructure spending is $200B+ annually and growing 40% YoY. Every hyperscaler needs what we're building.\nThe team has done this before. We've built and exited semiconductor companies at scale. This isn't our first rodeo.\nThe traction is de-risked. We have LOIs, strategic investors, and a clear path to revenue.\nThe work is consequential. You're not optimizing someone's ad click-through rate. You're building the silicon infrastructure that powers AI.\nThis is the bet. Join us and build something that matters.\nOr stay comfortable. No judgment.\nBut if you're the kind of person who wants to take the shot, we'd love to talk.\nREADY TO JOIN?\nRole Overview\nWe are seeking an experienced Senior CAD Engineer to develop, deployment, and support of advanced VLSI CAD methodologies and automation solutions. The role focuses on improving design productivity, quality, and scalability across RTL-to-GDS implementation flows. The ideal candidate will work closely with Physical Design, Frontend, DFT, STA, and EDA vendors to drive robust CAD infrastructure and enable successful tape-outs for complex SOCs.\nWhatYou’llDo\nDevelop, andmaintainscalable CAD flows for synthesis, physical design, STA, low-power verification, and signoff. \nDrive automation andmethodologyimprovements to enhance design efficiency, runtime, andQoR. \nCollaborate with design, verification, DFT, and implementation teams to understand flow requirements and deployment challenges. \nDebug complex flow,tool, and infrastructure-related issues across project execution. \nIntegrate and qualify new EDA tool releases and advanced node methodologies. \nDevelop automation scripts, regression environments, dashboards, and flow monitoring infrastructure. \nWork with foundries and EDA vendors on technology enablement and issue resolution. \nMentor engineers andestablishCAD best practices across teams. \nWhatWe’reLooking For\nBachelor’s orMaster’sdegree in Electronics, Computer Engineering, VLSI, or relatedfield. \n5+ years of experience in CAD engineering, physical designmethodology, or EDA flow development.\nStrongexpertisein ASIC/SOC implementation flows including synthesis, P&R, STA, physical verification, and low-power methodologies. \nHands-on experience with industry-standard EDA tools such as Cadence, Synopsys, and Siemens EDA tool suites. \nStrong programming and scripting skills inTcl, Python, Perl, and Shell scripting. \nExperience with distributed computing environments, regression frameworks, and infrastructure management. \nStrong debugging, analytical, communication, and stakeholder management skills. \nGood to Have\nExperience with cloud-enabled EDA infrastructure and workload management systems. \nExposure toAI/ML-driven CAD optimization methodologies. \nKnowledge of advanced technology nodes (5nm/3nm) and multi-die design flows. \nSuccess in This Role Looks Like\nDelivery of stable, scalable, and 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