{"id":2570200,"url":"https://alion.io/job/tylsemi-staff-dft-engineer","title":"Staff DFT Engineer","company":{"id":4380397,"name":"TYLsemi","domain":"tylsemi.ai","url":"https://alion.io/company/tylsemi","size_band":"501-1000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Rippling","truth_index":{"grade":"B","score":75,"open_postings":20,"ghost_share":0,"stale_share":1,"repost_share":0,"time_to_fill_p50_days":null,"computed_at":"2026-10-15T05:46:00Z"}},"role":"Industrial Engineering","role_family":"Industrial Engineering","seniority":"staff","employment_type":"full_time","work_mode":"remote","remote_scope":"stated_countries","remote_scope_basis":"board_field","remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bengaluru, India"],"countries":["IN"],"hiring_countries":["IN"],"hiring_countries_total":1,"salary":null,"salary_estimate":{"min_usd":21000,"max_usd":49000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":1531},"experience_years_min":8,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"HPC","optional":false},{"name":"OpenAI","optional":true},{"name":"Synopsys DFTMAX","optional":true},{"name":"Tessent","optional":true}],"status":"live","first_seen_at":"2026-07-31T10:43:49Z","employer_posted_date":"2026-07-31","last_verified_at":"2026-10-16T00:47:04Z","board_verified":true,"closed_at":null,"days_open":76,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":76},"description":"About TYLsemi, Inc.\nThe Opportunity\nThe AI infrastructure market is exploding. Every hyperscaler, every cloud provider, every AI company is building custom silicon. But they all face the same problem: how do you connect hundreds of chips, deliver clean power at scale, and move terabits of data without melting the package?\nThat's what we solve. TYLsemi builds the chiplet infrastructure IP - the IO, power delivery, and interconnect building blocks - that makes AI/HPC systems actually work at scale.\nThis isn't a nice-to-have. It's the critical path.\nWhy Now\nThe Market Window\nThe semiconductor industry is going through its biggest architectural shift in 40 years:\nMoore's Law is dead. 2nm and beyond delivers marginal performance gains. The future is chiplets, not monolithic dies.\nCustom silicon is now mainstream. Google, Microsoft, Amazon, Meta, OpenAI - they're all designing their own ASICs. The $50B custom silicon market is growing 30% annually.\nIO and power are the bottleneck. Solve hard problems and provide something which is a category in itself.\nTranslation: We're entering the market at exactly the moment when every major AI/HPC player needs what we're building, and their alternatives are disappearing.\nCulture & Team: How We Work\nNo Politics, No Bureaucracy\nThere are no layers, no approval chains, no corporate theater.\nIf you have an idea, we test it. If it works, we ship it.\nNo endless meetings, no PowerPoint presentations to convince middle management.\nRemote-Friendly, Global Team\nUS team: Bay Area preferred, but we hire the best people regardless of location\nIndia team: Building a world-class design center in Bangalore\nMove Fast, Ship Real Products\nWe're not a research project. We have paying customers, committed capital, and aggressive timelines.\nThis is a company, not a lifestyle business. We're building to win.\nWhat We Value\nOwnership mindset. You're not here to execute someone else's roadmap. You're here to define it.\nBias for action. We move fast. Analysis paralysis doesn't fly here.\nDeep technical expertise. This is hard engineering. We need people who've shipped real silicon and debugged real hardware.\nLow ego, high standards. We don't care about titles or politics. We care about results.\nThe Ask\nIf you're reading this, you're probably comfortable. You have a good job at a stable company with all the benefits.\nWe're asking you to walk away from that and bet on us.\nHere's why you should:\nThe market is real. AI infrastructure spending is $200B+ annually and growing 40% YoY. Every hyperscaler needs what we're building.\nThe team has done this before. We've built and exited semiconductor companies at scale. This isn't our first rodeo.\nThe traction is de-risked. We have LOIs, strategic investors, and a clear path to revenue.\nThe work is consequential. You're not optimizing someone's ad click-through rate. You're building the silicon infrastructure that powers AI.\nThis is the bet. Join us and build something that matters.\nOr stay comfortable. No judgment.\nBut if you're the kind of person who wants to take the shot, we'd love to talk.\nREADY TO JOIN?\nRole Overview\nWe are hiring aStaff DFT Engineer to lead DFT strategy, architecture, and implementation for complex, high-performance SoCs. You will define methodologies, and drive DFT from RTL to silicon bring-up, ensuring optimal quality, cost, and time-to-market.\nWhatYou’llDo\nDefine DFT architecture and test strategy for SoCs, including scan, compression, MBIST, LBIST, and IO test.\nLead ATPG pattern generation, optimization, and diagnosis flows across multiple fault models.\nArchitect and oversee MBIST, BISR, and memory repair solutions for large memory arrays.\nDesign and implement advanced test access mechanisms using JTAG, Boundary Scan (BSCAN), and IJTAG (IEEE 1687).\nDrive DFT timing closure, power-aware DFT, and hierarchical/multi-core test strategies.\nOwn pre-silicon DFT verification (ATPG simulation, GLS) and coverage closure.\nLead silicon bring-up, ATE test program development, post-silicon validation, debug, and yield improvement.\nCollaborate with cross-functional teams to integrate DFT into the overall design flow and resolve complex issues.\nMentor junior and mid-level engineers; contribute to methodology development and tool evaluation.\nOptimize test time, data volume, and manufacturing test costs.\nWhat We’re Looking For\nBachelor’s/master’s degree in Electronics/Electrical Engineering.\n8+ years of strong hands-on experience in DFT for complex SoC/ASIC projects.\nExpert-level knowledge of ATPG, MBIST, LBIST, IJTAG, BSCAN, scan compression, and related areas.\nProven track record in silicon bring-up, ATE support, and post-silicon debug.\nDeep understanding of full ASIC flow (RTL to Silicon) and DFT impact on PPA.\nProficiency with leading EDA tools (Synopsys TetraMAX/DFTMAX, Siemens/Tessent SSN, TestKompress etc.).\nStrong scripting and automation skills.\nGood To Have\nKnowledge of advanced topics like 2.5D/3D packaging test, analog/mixed-signal DFT.\nJob Location\nHybrid/ On-site - Bangalore / Remote - India","description_format":"text","description_chars":5052,"description_truncated":false,"requirements":{"experience_years_min":8,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[{"name":"India","iso":"IN","kind":"country"}],"hiring_excludes":[],"relocation_offered":false,"industries":["Design & Creative"],"lifecycle":[{"event":"open","at":"2026-10-14T22:44:48Z"}],"visa":[],"liveness":{"score":25,"band":"fade","label":"Fading","p_open":1,"p_active":0.57,"p_room":0.44,"age_days":75,"expected_fill_days":51,"reasons":["conf:3","stale_co","win:tail","crowd:"],"computed_at":"2026-10-15T05:46:00Z"},"pay":null,"html_url":"https://alion.io/job/tylsemi-staff-dft-engineer","json_url":"https://alion.io/job/tylsemi-staff-dft-engineer.json","meta":{"generated_at":"2026-10-16T03:24:19Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":5171,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-17T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":4380397},"rest":"https://alion.io/mcp/rest/get_company?id=4380397"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Ftylsemi-staff-dft-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Ftylsemi-staff-dft-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Ftylsemi-staff-dft-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/tylsemi-staff-dft-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Ftylsemi-staff-dft-engineer"}]}