APAC Algo Trading Low Latency C++ Developer

UBS • Commercial & Retail Banks • Verilog • C++ • VHDL • 9 days ago

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Location

In office (China)

Confirmed on the employer's own hiring board on Oct 19, 2026. First seen by Alion on Sep 11, 2026. UBS scores B on the Alion truth index.

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UBS

Headquartered in Zurich, Switzerland, UBS is a leading global financial services firm and one of the world's largest wealth managers. The company provides a comprehensive range of solutions, including private banking, personal and corporate banking, asset management, and investment banking services. Operating in major financial centers across the globe, the institution assists high-net-worth individuals, corporations, and institutional clients in managing and growing their assets.

ubs.com • HQ: Zurich, Switzerland • Asset Management & Funds • Investment Banking & M&A Advisory • Wealth Management & Financial Advisors • Commercial & Retail Banks • 5000+ employees • Est. 1998

Tech stack of UBS

Backed by Blue Lion

Join a high-performance team building ultra-low latency trading systems where nanoseconds matter. You’ll design and implement a trading rules engine for real-time controls using a hybrid of FPGA hardware and high-performance C++, enabling deterministic execution and rapid interaction with the markets.

Design and implement real-time trading rules and risk checks using FPGA (Verilog/VHDL) or C++.
Architect cycle-accurate FPGA designs and high-speed network interfaces (10/25/40/100GbE, RoCEv2) is preferred.
Build simulation and verification frameworks for FPGA reliability.
Drive full FPGA design flow (synthesis, place & route, timing closure).
Interface C++ applications with FPGA hardware for real-time orchestration.
Implement lock-free data structures and concurrency control in Linux.
Build low-latency network apps using kernel bypass (e.g., Rivermax).
Analyze system performance and resolve latency bottlenecks.
Collaborate with global IT, Quants, and Traders across asset classes.

• Provide Level 3 support for production systems.

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