{"id":1247094,"url":"https://alion.io/job/unconventional-ai-ai-silicon-digital-design-engineer","title":"AI Silicon, Digital Design Engineer","company":{"id":1939788,"name":"Unconventional AI","domain":"unconv.ai","url":"https://alion.io/company/unconv","size_band":"51-200","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Greenhouse","truth_index":{"grade":"A","score":86,"open_postings":11,"ghost_share":0,"stale_share":0.545,"repost_share":0,"time_to_fill_p50_days":null,"computed_at":"2026-11-02T06:13:15Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Mountain View, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":144000,"max_usd":266000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":1517},"experience_years_min":8,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Formal Verification","optional":false},{"name":"Verilog","optional":false}],"status":"live","first_seen_at":"2026-06-24T16:57:03Z","employer_posted_date":"2026-07-24","last_verified_at":"2026-11-02T10:47:30Z","board_verified":true,"closed_at":null,"days_open":130,"trust":{"level":"stale","repost_count":0,"flags":["stale"],"days_open":130},"description":"About Unconventional\nSince 2022, AI has entered the mainstream, reshaping entire industries from education and software development to fundamental consumer behaviors. This revolution has created an unprecedented demand for computation - a demand that is now fundamentally limited by energy, not just in the datacenter, but at a global scale.\nAt Unconventional, our mission is to solve this. We are rethinking computing from the ground up to build a new foundation for AI that is 1000x more efficient. We're doing this by exploiting the rich physics of semiconductors, mapping neural networks directly to the device physics rather than relying on layers of inefficient abstraction.\nThe Role\nAs a Member of Technical Staff, Digital Design Engineer, you will be a foundational member of our small, multi-disciplinary R&D team. We are looking for accomplished and highly motivated individuals with a strong understanding of SoC design who are excited to tackle the hardest, most ambiguous technical challenges at the intersection of AI, physics, and computer architecture. You will be responsible for driving invention, prototyping, and validation of the core components of our novel computing platform.\nResponsibilities\nDigital Design:Lead the detailed micro-architecture definition and top-level integration of digital blocks, including CPU, memory subsystems, and interfaces.\nOwn for the integration of third-party IP into the main SoC fabric.\n\nTechnical Leadership & Mentoring:Provide technical guidance and mentorship to junior digital design engineers.\nContribute to setting best practices for design methodologies, code reviews, and quality assurance processes.\nEnhance and contribute to early stage design infrastructure for rapid tapeout.\n\nHands-on RTL Implementation:Drive and perform hands-on RTL design for complex, timing-critical SoC blocks and digital interfaces, ensuring power, performance, and area (PPA) targets are met.\nImplement and debug key digital interfaces\n\n Synthesis & Timing: \nPerform initial synthesis and formal verification (LEC) to ensure the design is routable and meets frequency targets.\nCreate block-level timing constraints\nLint & CDC: Run and resolve RTL linting, Clock Domain Crossing (CDC), and Reset Domain Crossing (RDC) checks using industry standard tools.\n Design Verification (DV) Support:\nParticipate in the block-level verification plan and help develop a robust verification environment.\nTriage and debug complex simulation failures to ensure functional correctness.\n Physical Design Interface:Facilitate seamless hand-off between internal design and internal or external physical implementation teams (synthesis, timing closure).\n\nMinimum Qualifications\nEducation: B.S. or M.S. in Electrical Engineering, Computer Engineering, or a related field.\nExperience: 8+ years of industry experience in digital ASIC/SoC design.\nStrong Technical Expertise:\nExpertise in Verilog RTL coding and digital design fundamentals.\n Design Flow Proficiency:\nFamiliarity with standard EDA tools for simulation, synthesis, linting, and clock domain crossing (CDC) analysis.\nUnderstanding of the full ASIC design flow, from specification to tape-out.\nCommunication: Excellent written and verbal communication skills.\nLeadership: ability to lead junior engineers to achieve team goals, and to assist in the development of their skills.\nPreferred Qualifications (Nice to Have)\nExperience with creating digital designs, including synchronous and asynchronous logic, state machines, and bus protocols.\nExperience developing scripts or tooling for design automation.\nExperience optimizing designs for performance, power, or area.\nExperience with modern design methods, including generative AI code development platforms.\nExperience with analog mixed signal technology and interfaces.\nWhy Join Us?\nThe Mission: Redefine computing for the next 50 years by solving the fundamental energy limitation of AI at a global scale.\nThe Impact: Shape the company's future as a foundational team member. Enjoy massive ownership and an outsized opportunity to drive change.\nThe Challenge: Dive into deeply complex, intellectually stimulating, and unsolved problems at the cutting edge of multiple, converging fields.\n The Perks: A comprehensive package including best-in-class health benefits, 401k matching, truly unlimited PTO, and complimentary meals in our Palo Alto office.","description_format":"text","description_chars":4383,"description_truncated":false,"requirements":{"experience_years_min":8,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":["401k plan","Unlimited PTO"],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["AI Chips & Accelerators"],"lifecycle":[{"event":"open","at":"2026-09-25T17:56:03Z"}],"visa":[],"liveness":{"score":6,"band":"cold","label":"Long shot","p_open":1,"p_active":0.229,"p_room":0.28,"age_days":130,"expected_fill_days":36,"reasons":["conf:3","stale_co","win:tail","crowd:"],"computed_at":"2026-11-02T06:13:15Z"},"pay":null,"html_url":"https://alion.io/job/unconventional-ai-ai-silicon-digital-design-engineer","json_url":"https://alion.io/job/unconventional-ai-ai-silicon-digital-design-engineer.json","meta":{"generated_at":"2026-11-02T11:52:55Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":16351,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-11-03T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":1939788},"rest":"https://alion.io/mcp/rest/get_company?id=1939788"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Funconventional-ai-ai-silicon-digital-design-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Funconventional-ai-ai-silicon-digital-design-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Funconventional-ai-ai-silicon-digital-design-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/unconventional-ai-ai-silicon-digital-design-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Funconventional-ai-ai-silicon-digital-design-engineer"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":1247094}},{"tool":"search_jobs","arguments":{"company":"unconv.ai","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":1247094},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); https://alion.io/mcp with an Alion account has everything. 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