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Location
In office (Bengaluru)
Seniority
Middle · 3+ years exp

Confirmed on the employer's own hiring board on Oct 20, 2026. First seen by Alion on Oct 8, 2026. UST scores B on the Alion truth index.

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UST

UST is a leading global digital technology and transformation services company that provides innovative solutions to enterprise clients worldwide. Headquartered in Aliso Viejo, California, the firm specializes in digital consulting, cloud infrastructure, product engineering, and cybersecurity. Founded in 1998, it partners with major organizations across diverse industries to accelerate technological modernization and build agile, scalable business models.

PCIe Validation Engineer Experience: 3-5 Years Job Description We are looking for an entry-level PCIe Validation Engineer to support validation, bring-up, and testing of PCIe-based designs. The candidate should have strong fundamentals in digital electronics and basic understanding of PCIe. Key Responsibilities

  • Execute PCIe validation test cases on FPGA/platform environments.
  • Support board bring-up, debug, and functional validation.
  • Analyze logs, test results, and failure symptoms.
  • Work with design and verification teams to isolate and report issues.
  • Perform basic PCIe protocol checks and validation activities.
  • Document test results, observations, and defects clearly. Must Have
  • 0-2 years of experience in validation, testing, or digital design.
  • Basic understanding of digital electronics and computer architecture.
  • Fundamental knowledge of PCIe protocol concepts.
  • Ability to execute test plans and analyze failures.
  • Good debugging, documentation, and communication skills.
  • Willingness to work in lab validation and hardware debug environments. Good to Have
  • Exposure to FPGA boards, oscilloscopes, protocol analyzers, or logic analyzers.
  • Familiarity with Linux commands and system-level debugging.
  • Scripting knowledge in Python or Shell.
  • Understanding of interfaces such as I2C, SPI, UART, or AXI.
  • Knowledge of PCIe 5.0 and PCIe 6.0 features will be a plus Role Goals
  • Support successful PCIe validation and platform bring-up.
  • Build strong debugging and protocol validation skills.
  • Ensure accurate execution and reporting of validation tests
  • Develop expertise in PCIe system-level validation
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