{"id":3523728,"url":"https://alion.io/job/verilab-design-verification-engineer","title":"Design Verification Engineer","company":{"id":4444422,"name":"Verilab","domain":"verilab.com","url":"https://alion.io/company/verilab","size_band":null,"is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Comeet","truth_index":null},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"explicit","locations":["Lakeway, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":121000,"max_usd":224000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":1517},"experience_years_min":7,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"C++","optional":false},{"name":"Formal Verification","optional":false},{"name":"Perl","optional":false},{"name":"Python","optional":false},{"name":"SystemVerilog","optional":false},{"name":"UVM","optional":false}],"status":"live","first_seen_at":"2026-05-26T16:23:19Z","employer_posted_date":"2026-05-26","last_verified_at":"2026-10-30T22:14:16Z","board_verified":true,"closed_at":null,"days_open":157,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":157},"description":"Description\nJob Summary\nWe invite you to join our highly motivated team of consultants, providing clients with the very best in verification. You will be exposed to a diverse range of designs and application areas. We work on leading edge Audio, Automotive, Comms, Processors, Space, Video and more.\nYou will have the opportunity to travel, present at conferences, win Best Paper awards, or get involved with industry standards. We do it all. In addition to being good, we like to be seen to be good.\nAs a permanent full-time employee of Verilab, you will be responsible for all aspects of verification planning, management and implementation. You will be directly involved with helping build and grow client relationships.\nYou will be working alongside some of the smartest people in the industry. Verilab is a company where your skills will be tested, nurtured, and where your contribution makes a difference.\nRequirements\nKey Qualifications\nBSc/MSc in Electronic Engineering, Computer Engineering, or Computer Science.\n7 years of project-proven verification experience.\nExperienced SystemVerilog/UVM developer:\nBlock and integration-level\nCoverage-driven, self-checking verification environments from scratch\nHigh-level sequence-based stimulus\nComplex transaction-based checkers (e.g. scoreboards with data translation and ordering)\nRegister models\nSpecification level checks for several different protocols, e.g. AXI, DDRx, PCIe, USBx.\nVerification planning:\nRequirements capture and traceability\nEstimation, prioritizing\nMetrics used to determine verification closure\nOwnership of work, from planning to implementation.\nExperience dealing directly with strict deadlines and technical challenges.\nEffective communication and collaboration with others.\nOther Interesting Qualifications\nOther Interesting Qualifications\nSpecman/e expertise to a similar level.\nC/C++ developing, or integrating, reference models into SystemVerilog/UVM environments.\nFormal Verification: Formal Property Verification, Proof Kits.\nExperience leading a technical team, including mentoring, training, and performing technical peer reviews.\nEmbedded programming for ARM, or GPU processors.\nPython or Perl.\nBenefits\nBenefits\nFull-time permanent employee with competitive salary.\n20 days paid vacation and observed holidays.\n401k Matching up to 6%.\nMedical, dental, vision, term life, AD&D, and disability (100% of all premiums covered by Verilab).\nEligibility for bonuses.\nBirthday gifts.\nBook budget.\nLeading industry career and personal development training.\nAdditional Requirements\nAdditional Requirements\nAll candidates must be eligible to work in the United States.\nThe ability to travel is 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