{"id":3247948,"url":"https://alion.io/job/viasat-senior-fpga-development-engineer","title":"Senior FPGA Development Engineer","company":{"id":1758272,"name":"Viasat","domain":"viasat.com","url":"https://alion.io/company/viasat-com","size_band":"201-500","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Jibe","truth_index":{"grade":"B","score":80,"open_postings":33,"ghost_share":0,"stale_share":1,"repost_share":0,"time_to_fill_p50_days":8,"computed_at":"2026-10-26T05:57:25Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Farnborough, United Kingdom"],"countries":["GB"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":74000,"max_usd":134000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":41},"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Assembly","optional":false},{"name":"Siemens ModelSim","optional":false},{"name":"Siemens QuestaSim","optional":false},{"name":"UVM","optional":false},{"name":"VHDL","optional":false}],"status":"live","first_seen_at":"2026-01-22T09:58:00Z","employer_posted_date":"2026-10-25","last_verified_at":"2026-10-26T11:13:47Z","board_verified":true,"closed_at":null,"days_open":277,"trust":{"level":"stale","repost_count":0,"flags":["stale"],"days_open":276},"description":"About usOne team. Global challenges. Infinite opportunities. At Viasat, we’re on a mission to deliver connections with the capacity to change the world. For more than 35 years, Viasat has helped shape how consumers, businesses, governments and militaries around the globe communicate. We’re looking for people who think big, act fearlessly, and create an inclusive environment that drives positive impact to join our team.\nWhat you'll do\nViasat UK, is seeking to expand its UK team to better exploit opportunities within UK and European markets. Viasat has transformed the market for delivery of assured Data at Rest solutions and as such is expanding its business where a FPGA Design Engineer is required to work across multiple Cyber and Information Assurance development projects.\nViasat UK are looking to recruit an experienced FPGA Design Engineer who can operate in a fast-paced environment as part of a multi-disciplined team designing, developing and testing standard product and bespoke secure digital design solutions. As a FPGA Design Engineer on our team, you will jump into all aspects of a challenging and rewarding engineering role that involves requirements elicitation, architecting, design, implementation and test of programmable logic and embedded firmware solutions. You will be responsible for the delivery of the FPGA solution, meeting technical and project requirements throughout the complete lifecycle.\nThese are complex FPGA designs involving industry standard as well as custom interfaces and protocols.\nThe successful candidate must have or be able to obtain UK SC clearance.\nThe day-to-day\nWorking with the development team the FPGA Design Engineer owns the delivery of the FPGA solution from requirements through development and into production from a technical and project perspective.\nLeads the elicitation of requirements to define the FPGA implementation\nWorking with the development team, owns the definition of the FPGA architecture.\nWorks with Project Manager to define project plan and ensure delivery is against the plan\nMay co-ordinate other FPGA design Engineers on a particular design\nResponsible for the interface with external FPGA and IP suppliers.\nTest bench development and test in the systemFrom time to time you may be involved in supporting proposal generation and estimation, as well as the creation of white papers supporting future technology roadmaps.\n\nWhat you'll need\nExperience taking FPGA designs through the complete development life cycle\nStrong skills in FPGA development (design and verification) using VHDL\nAbility to optimise deigns for performance and power dissipation.\nExperience performing integration/debug of FPGA solutions in hardware\nExperience in using configuration management systems for code control\nExperience developing HDL solutions for Microchip devices and using Libero for design synthesis an advantage.\nExperience verifying HDL solutions using Modelsim/Questasim (UVM experience would be beneficial).\nUK citizenship\nWhat will help you on the job\nRequirement’s analysis, capture and management using DOORs\nUse of SmartFusion, Igloo or PolarFire device(s)\nKnowledge of PCIe NVME and implementation in FPGA\nUse Xilinx or Altera devices and toolsets\nExperience in the definition and use of 3rd party IP\nDesign for security\nEmbedded firmware design (C/C++/assembler)\nCryptographic standards and algorithms\nGood knowledge of the integration of FPGAs in hardware platforms\n________\nEEO Statement\nViasat is proud to be an equal opportunity employer, seeking to create a welcoming and diverse environment. All qualified applicants will receive consideration for employment without regard to race, color, religion, gender, gender identity or expression, sexual orientation, national origin, ancestry, physical or mental disability, medical condition, marital status, genetics, age, or veteran status or any other applicable legally protected status or characteristic. If you would like to request an accommodation on the basis of disability for completing this on-line application, please click here.\nWorking with the development team the FPGA Design Engineer owns the delivery of the FPGA solution from requirements through development and into production from a technical and project perspective.\nLeads the elicitation of requirements to define the FPGA implementation\nWorking with the development team, owns the definition of the FPGA architecture.\nWorks with Project Manager to define project plan and ensure delivery is against the plan\nMay co-ordinate other FPGA design Engineers on a particular design\nResponsible for the interface with external FPGA and IP suppliers.\nTest bench development and test in the systemFrom time to time you may be involved in supporting proposal generation and estimation, as well as the creation of white papers supporting future technology roadmaps.\n\nExperience taking FPGA designs through the complete development life cycle\nStrong skills in FPGA development (design and verification) using VHDL\nAbility to optimise deigns for performance and power dissipation.\nExperience performing integration/debug of FPGA solutions in hardware\nExperience in using configuration management systems for code control\nExperience developing HDL solutions for Microchip devices and using Libero for design synthesis an advantage.\nExperience verifying HDL solutions using Modelsim/Questasim (UVM experience would be beneficial).\nUK citizenship","description_format":"text","description_chars":5437,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Satellite Communications","Mobile Networks"],"lifecycle":[{"event":"open","at":"2026-10-25T19:20:14Z"}],"visa":[],"liveness":{"score":6,"band":"cold","label":"Long shot","p_open":1,"p_active":0.232,"p_room":0.28,"age_days":276,"expected_fill_days":8,"reasons":["conf:3","stale_co","velocity","win:tail","crowd:brand"],"computed_at":"2026-10-26T05:57:25Z"},"pay":null,"html_url":"https://alion.io/job/viasat-senior-fpga-development-engineer","json_url":"https://alion.io/job/viasat-senior-fpga-development-engineer.json","meta":{"generated_at":"2026-10-26T11:54:36Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":16199,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-27T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":1758272},"rest":"https://alion.io/mcp/rest/get_company?id=1758272"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fviasat-senior-fpga-development-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fviasat-senior-fpga-development-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fviasat-senior-fpga-development-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/viasat-senior-fpga-development-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fviasat-senior-fpga-development-engineer"}]}