{"id":551668,"url":"https://alion.io/job/weekday-customanalog-layout","title":"Custom/Analog Layout","company":{"id":7097,"name":"Weekday","domain":"weekday.works","url":"https://alion.io/company/weekday","size_band":"51-200","is_staffing_agency":true,"employer_type":"agency","is_intermediary":false,"listed_via":null,"ats_vendor":"Workable","truth_index":{"grade":"B","score":81,"open_postings":90,"ghost_share":0,"stale_share":0.978,"repost_share":0,"time_to_fill_p50_days":6,"computed_at":"2026-10-27T05:46:45Z"}},"role":"Hardware","role_family":"Hardware","seniority":null,"employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Hyderabad, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":1200000,"max":1800000,"currency":"INR","period":"year","gross":null,"usd_annual":19112},"salary_estimate":null,"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[],"status":"live","first_seen_at":"2026-09-08T00:00:00Z","employer_posted_date":"2026-09-08","last_verified_at":"2026-10-27T04:50:18Z","board_verified":true,"closed_at":null,"days_open":49,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":49},"description":"This role is for one of Weekday’s clients\nSalary range: Rs 1200000 - Rs 1800000 (ie INR 12 - 18 LPA)\nMin Experience: 4+ years\nLocation: Hyderabad\nJobType: full-time\nWe are looking for an experienced and detail-oriented Custom/Analog Layout Engineer with 4-11 years of hands-on experience in semiconductor physical design. The ideal candidate will have strong expertise in Analog Layout and Custom Layout, with a solid understanding of analog and mixed-signal circuit requirements, layout methodologies, and advanced semiconductor process technologies.\nIn this role, you will be responsible for translating circuit schematics into high-quality physical layouts while ensuring performance, reliability, area efficiency, and manufacturability. You will work closely with circuit designers, physical design engineers, and technology teams to develop layouts for complex analog and custom blocks.\nRequirements\nKey Responsibilities\nDesign and develop custom and analog layouts for semiconductor devices and integrated circuits based on schematics and design specifications.\nPerform complete Analog Layout implementation for blocks such as amplifiers, ADCs/DACs, PLLs, bandgaps, references, regulators, oscillators, and other analog/mixed-signal circuits.\nDevelop high-quality Custom Layout using appropriate layout techniques and process-specific design rules.\nApply advanced layout techniques including common-centroid, interdigitation, symmetry, matching, shielding, guard rings, dummy devices, and differential routing.\nAnalyze circuit requirements and translate electrical constraints into optimized physical layouts.\nPerform Design Rule Check (DRC), Layout Versus Schematic (LVS), and parasitic extraction and resolve related issues.\nWork with circuit designers to identify and address layout-dependent effects, parasitics, matching issues, and performance degradation.\nOptimize layouts for area, power, signal integrity, noise, matching, and overall circuit performance.\nParticipate in post-layout simulations and troubleshoot issues related to parasitic resistance and capacitance.\nEnsure layouts comply with foundry-specific process design kits (PDKs), technology files, and design methodologies.\nCollaborate with cross-functional teams throughout the design, verification, and tape-out process.\nMaintain accurate documentation and follow established layout quality and verification standards.\nMust-Have Skills\nStrong hands-on experience in Analog Layout.\nStrong expertise in Custom Layout.\n4-11 years of relevant experience in semiconductor/VLSI layout design.\nGood understanding of analog and mixed-signal circuit concepts.\nStrong knowledge of layout-dependent effects, device matching, parasitics, and physical design considerations.\nHands-on experience with DRC, LVS, and parasitic extraction.\nExperience working with industry-standard custom layout and verification tools.\nAbility to interpret schematics and understand circuit-level design requirements.\nStrong understanding of CMOS technologies and semiconductor fabrication concepts.\nExperience working with foundry PDKs and technology-specific design rules.\nStrong debugging and problem-solving skills with attention to layout quality and detail.\nGood-to-Have Skills\nExperience with advanced-node technologies and complex analog/mixed-signal designs.\nExposure to high-speed, RF, memory, or power-management layouts.\nKnowledge of post-layout simulation and parasitic-aware circuit optimization.\nExperience supporting full-chip integration and tape-out activities.\nFamiliarity with automation or scripting for layout-related tasks.\nEducation\nBachelor’s or Master’s degree in Electronics Engineering, Electrical Engineering, VLSI Design, Microelectronics, or a related discipline.","description_format":"text","description_chars":3738,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":[],"lifecycle":[{"event":"open","at":"2026-09-08T16:02:15Z"}],"visa":[],"liveness":{"score":3,"band":"cold","label":"Long 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