{"id":1295838,"url":"https://alion.io/job/xcena-soc-fpga-design-engineer","title":"SoC FPGA Design Engineer","company":{"id":2138787,"name":"XCENA","domain":"xcena.com","url":"https://alion.io/company/xcena","size_band":"51-200","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Greeting","truth_index":{"grade":"B","score":75,"open_postings":13,"ghost_share":0,"stale_share":1,"repost_share":0,"time_to_fill_p50_days":null,"computed_at":"2026-10-12T06:55:09Z"}},"role":"Hardware","role_family":"Hardware","seniority":null,"employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Seongnam, South Korea"],"countries":["KR"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":null,"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Mentor PADS","optional":false},{"name":"OrCAD","optional":false},{"name":"SystemVerilog","optional":false},{"name":"Verilog","optional":false},{"name":"Xilinx Vivado","optional":false},{"name":"Siemens Veloce","optional":true},{"name":"Synopsys ZeBu","optional":true}],"status":"live","first_seen_at":"2026-09-26T09:06:12Z","employer_posted_date":"2026-09-26","last_verified_at":"2026-10-12T18:14:10Z","board_verified":true,"closed_at":null,"days_open":16,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":16},"description":"Overview\nXCENA SoC Proto-Typing를 위한 FPGA Board를 설계하고, 검증합니다. XCENA의 주요 IP 들과 FPGA 전용의 IP 들을 FPGA Top Level에서 integration하고 합성(주로 Xilinx 기반 FPGA 활용)합니다. FPGA B’d Level에서 발생하는 문제들을 해결하고, FPGA를 활용한 SoC 검증을 수행합니다. 이 후, 필요 시 inhouse FPGA or ASIC Board 설계를 진행합니다.\nRequirements\n전기전자공학 혹은 관련 전공 BS/MS/Ph.D\nVerilog and System Verilog RTL design skill\nFPGA 설계를 위한 각종 EDA tool 사용 경험(Vivado, OrCAD, PADS 등)\nPreferred Experiences\n3년 이상의 FPGA 설계 경험\nXilinx FPGA 기반 Embedded 회로 설계 경험\nEmulator(Veloce, ZeBu 등) 활용 경험\n[채용절차]\n서류 전형 > 면접 > 처우 협의 > 채용 건강 검진 > 입사 확정 및 입사 일정 논의 > 입사\n[엑시나 복지 제도]\n- 한 달에 하루 구성원들이 스스로 정하는 유급 휴가(MX Day) 지원. 연휴를 더 길게, 휴일이 없는 달도 충분한 휴식 보장\n- 출퇴근 시간에 제약이 없는 유연 근무제\n- 점심 및 저녁 식대(야근 시) 제공\n- 다양한 간식 무한 제공 (네스프레소 커피, 음료, 스낵 등)\n- 연 1회 배우자를 포함하여 건강 검진 지원","description_format":"text","description_chars":751,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"phd","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Incident Response"],"lifecycle":[{"event":"open","at":"2026-09-26T09:06:12Z"}],"visa":[],"liveness":{"score":48,"band":"ok","label":"Likely open","p_open":1,"p_active":0.504,"p_room":0.945,"age_days":15,"expected_fill_days":33,"reasons":["conf:1","stale_co","velocity","win:mid"],"computed_at":"2026-10-12T06:55:09Z"},"pay":null,"html_url":"https://alion.io/job/xcena-soc-fpga-design-engineer","json_url":"https://alion.io/job/xcena-soc-fpga-design-engineer.json","meta":{"generated_at":"2026-10-12T21:59:48Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":35953,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-13T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":2138787},"rest":"https://alion.io/mcp/rest/get_company?id=2138787"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fxcena-soc-fpga-design-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fxcena-soc-fpga-design-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fxcena-soc-fpga-design-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/xcena-soc-fpga-design-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fxcena-soc-fpga-design-engineer"}]}