Software Engineer III, ML, TPU Efficiency

About the job

Google's software engineers develop the next-generation technologies that change how billions of users connect, explore, and interact with information and one another. Our products need to handle information at massive scale, and extend well beyond web search. We're looking for engineers who bring fresh ideas from all areas, including information retrieval, distributed computing, large-scale system design, networking and data storage, security, artificial intelligence, natural language processing, UI design and mobile; the list goes on and is growing every day. As a software engineer, you will work on a specific project critical to Google’s needs with opportunities to switch teams and projects as you and our fast-paced business grow and evolve. We need our engineers to be versatile, display leadership qualities and be enthusiastic to take on new problems across the full-stack as we continue to push technology forward.

With your technical expertise you will manage project priorities, deadlines, and deliverables. You will design, develop, test, deploy, maintain, and enhance software solutions.

On this team, you will own the optimization of the models powering the YouTube algorithm. Your work will focus on model efficiency optimization, such as low-precision quantization , knowledge distillation, parameter sharing, and designing hardware-friendly model architectures, to reduce training and serving costs while maximizing fleet utilization and value delivered to users.

You will build support and optimize new and existing models in our Recommendation System stack, including new model architectures while adapting to next-generation TPU hardware.

You will engage in model and TPU compiler co-design, with opportunities to work across the stack ranging from end-user ML models down to Hardware/Software architecture.

At YouTube, we believe that everyone deserves to have a voice, and that the world is a better place when we listen, share, and build community through our stories. We work together to give everyone the power to share their story, explore what they love, and connect with one another in the process. Working at the intersection of cutting-edge technology and boundless creativity, we move at the speed of culture with a shared goal to show people the world. We explore new ideas, solve real problems, and have fun - and we do it all together.Individual pay is determined by factors including job-related skills, experience, and relevant education or training.

US: $147000 - $210000 (USD) + 15% bonus target + equity + benefits

Learn more about benefits at Google.

Responsibilities

• Profile ML workloads, identify compute and memory bandwidth bottlenecks, and optimize accelerator utilization to maximize compute efficiency.
• Explore, implement, and productionize algorithmic efficiency techniques, including low-precision quantization, knowledge distillation, parameter sharing, and attention optimizations.
• Optimize auxiliary serving and distributed data pipelines, including data ingestion, feature transformation, embedding lookups, and memory caching to support real-time training and inference.
• Partner closely with ML model developers and researchers to co-design hardware-friendly model architectures and deploy universal efficiency libraries.

Qualifications

Minimum qualifications:

• Bachelor's degree or equivalent practical experience.
• 2 years of experience programming in C++ or Python.
• 2 years of experience with software design and architecture.
• 2 years of experience testing, and launching software products.
• Experience with ML model optimization.
• Experience with ML frameworks such as TensorFlow, JAX, and PyTorch, or ML compilers (e.g., accelerated linear algebra (XLA)).

Preferred qualifications:

• Master's degree or PhD in Computer Science or related technical fields.
• Experience developing accessible technologies.
• Experience with debugging correctness and performance issues at all levels of the ML software stack.
• Experience with ML compilers and their internals, experience writing compiler optimization passes.
• Familiarity with accelerator hardware architectures (TPUs/GPUs).