{"id":50897,"url":"https://alion.io/job/zeiss-fpga-developer-fmx","title":"FPGA Developer (f/m/x)","company":{"id":5290,"name":"Zeiss","domain":"zeiss.com","url":"https://alion.io/company/zeiss","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":77,"open_postings":247,"ghost_share":0,"stale_share":0.935,"repost_share":0,"time_to_fill_p50_days":26,"computed_at":"2026-10-17T05:46:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":null,"employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Oberkochen, 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Verilog\n\nDevelop and integrate FPGA modules, including custom IP cores, communication interfaces, and control logic\n\nAnalyse system requirements and translate them into efficient and maintainable FPGA realisations\n\nPerform functional simulation, timing analysis, verification, and validation of FPGA designs\n\nDebug and troubleshoot FPGA implementations using simulation and hardware debugging tools\n\nOptimise FPGA designs for timing closure, resource utilisation, power consumption, and performance\n\nImplement and verify high-speed interfaces and protocols such as PCIe, Ethernet, and memory interfaces\n\nCollaborate with FPGA architects, hardware engineers, software developers, and system architects to ensure seamless system integration\n\nCreate and maintain technical documentation, including design specifications, interface descriptions, test plans, and verification reports\n\nParticipate in design reviews and contribute to reusable FPGA platforms, coding standards, and development best practices\n\nActively share knowledge and support the continuous improvement of FPGA development methodologies, tools, and workflows\n\n Your Profile:\nSuccessfully completed studies in electrical engineering, computer engineering, communications engineering, computer science, or a comparable field\n\nSolid experience in FPGA development using VHDL and/or Verilog\n\nStrong understanding of digital design principles, FPGA architectures, synchronous systems, and clock domain crossing concepts\n\nExperience with FPGA development environments such as Xilinx Vivado, Intel Quartus, or similar toolchains\n\nKnowledge of simulation and verification methodologies using tools such as ModelSim, QuestaSim, OSVVM, or UVM\n\nExperience with timing analysis, timing closure, debugging, and performance optimisation of FPGA designs\n\nFamiliarity with high-speed communication interfaces and protocols such as PCIe, Ethernet, DDR, or comparable technologies\n\nUnderstanding of system integration and collaboration within interdisciplinary hardware and software development teams\n\nStrong analytical and problem-solving skills combined with a structured and quality-oriented working style\n\nHigh level of initiative, ownership, and commitment to delivering reliable FPGA solutions\n\nExcellent teamwork and communication skills\n\nProficiency in German and English, both written and spoken\n\nEnthusiasm for developing innovative solutions in a high-tech environment\n\nYour ZEISS Recruiting Team:\nAndre Grunzel, Matthias Sonnentag","description_format":"text","description_chars":2598,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[{"language":"English","level":"Advanced (C1)","optional":false},{"language":"German","level":"Advanced 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