{"id":1709763,"url":"https://alion.io/job/zero-point-motion-fpga-verification-control-systems-engineer","title":"FPGA Verification & Control Systems Engineer","company":{"id":3798709,"name":"Zero Point Motion","domain":"zeropointmotion.com","url":"https://alion.io/company/zeropointmotion","size_band":"51-200","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Teamtailor","truth_index":{"grade":"B","score":75,"open_postings":9,"ghost_share":0,"stale_share":1,"repost_share":0,"time_to_fill_p50_days":null,"computed_at":"2026-10-12T06:55:09Z"}},"role":"Hardware","role_family":"Hardware","seniority":null,"employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"inferred","locations":[],"countries":[],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":null,"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":true,"technologies":[{"name":"Python","optional":false},{"name":"SystemVerilog","optional":false},{"name":"Verilog","optional":false},{"name":"MATLAB","optional":true}],"status":"live","first_seen_at":"2026-01-09T15:19:38Z","employer_posted_date":"2026-01-09","last_verified_at":"2026-10-12T23:27:50Z","board_verified":true,"closed_at":null,"days_open":276,"trust":{"level":"stale","repost_count":0,"flags":["stale"],"days_open":275},"description":"At Zero Point Motion, the FPGA is not glue logic.\nIt is a core part of the sensing system.\nThis role exists to design, verify, and operate real-time digital systems that directly interact with physical reality: MEMS motion, photonic signals, noise, timing, and control loops.\nIf you think of FPGA work as abstract RTL design, this role is not for you.\nIf you think of digital systems as applied mathematics implemented in silicon, it might be.\nThe Role\nAs an FPGA / Digital Systems Engineer, you own real-time digital control and signal processing that directly interfaces with MEMS and photonic hardware.\nYour work directly determines lock stability, noise floors, measurement fidelity, and whether demos succeed or fail.\nThis is a hands-on role. Verification quality, timing discipline, and physical intuition matter more than clever architectures. If you write the code, you own proving that it is correct.\nThe role sits close to R&D: the FPGA is part of discovering system truth, not just implementing a frozen design.\nWhat You’ll Do\nDigital control & signal processing\nDesign, implement, and verify FPGA systems interfacing with photonic sensors, MEMS devices, and high-speed ADCs/DACs\n\nImplement and stabilise real-time systems such as:\nPLLs\n\nAGC\n\nnested feedback loops\n\nquadrature demodulation\n\nforce-to-rebalance control\n\nReason explicitly about timing, latency, jitter, phase noise, quantisation, and numerical stability\n\nDigital ↔ physical reasoning\nTranslate mathematical models and control theory into discrete-time digital implementations\n\nUnderstand how RTL decisions affect mechanical motion, optical phase, thermal drift, and noise coupling\n\nTreat the FPGA as part of the physical system, not an isolated digital block\n\nHardware interfaces & IO\nImplement and debug SPI, I²C, UART, GPIO, and high-speed ADC/DAC interfaces\n\nDesign safe clock-domain crossings intentionally\n\nBuild reliable data logging and streaming under real-time constraints\n\nVerification & observability (non-negotiable)\nBuild proper verification environments:\nstructured testbenches\n\nassertions tied to invariants\n\ndeterministic stimuli\n\nquantitative pass/fail metrics\n\nVerification must be automated, repeatable, and explainable\n\nEyeballing oscilloscope traces is not verification\n\nDesign for observability with internal instrumentation and clear failure modes\n\nTooling, lab work & data\nWrite clean, disciplined RTL (Verilog / SystemVerilog)\n\nUse Python as a first-class tool for test automation, bring-up, verification support, and data analysis\n\nBe fluent with lab instrumentation and understand their limitations, not just their outputs\n\nRequired Background\nYou must have:\nStrong fundamentals in digital design and real-time systems\n\nSolid grounding in control theory or signal processing\n\nHands-on experience bringing up FPGA designs on real hardware\n\nExperience implementing and verifying control loops, PLLs, or equivalent feedback systems\n\nComfort working at the boundary between digital logic, analog signals, and physical systems\n\nHigh personal standards around correctness, verification, and documentation\n\nExperience with ASIC flows is a plus, not a requirement\n\nWho This Role Is For\nThis role is not for:\nMATLAB-first engineers\n\nsimulation-only designers\n\nFPGA developers who avoid lab work\n\npeople who “verify” by visual inspection\n\nengineers uncomfortable with noise, timing, or pressure\n\nWhat This Role Is Not\nThis is not:\na pure web, SaaS, or framework-driven role\n\na narrowly scoped backend position\n\na job for people who only write one-off scripts and move on\n\na place for over-abstracted code no one can debug\n\na role for people who wait for perfect specifications\n\nHow You Show Up\nYou are motivated by the underlying mathematics, not just by making something work\n\nYou do not ship what you cannot explain\n\nYou treat verification as a core engineering discipline\n\nYou communicate clearly, especially under pressure\n\nYou design margins so systems work without heroics\n\nWhat Success Looks Like\nAfter 6-12 months:\nFPGA-based control loops are stable, low-noise, and explainable\n\nVerification is trusted because it is systematic and repeatable\n\nTiming closure is boring because it was designed correctly\n\nDemos work because margins exist, not because of last-minute tuning\n\nBugs are found early and are diagnosable when they do occur\n\nThe FPGA is a transparent, instrumented part of the system - not a black box\n\nWorking with us\nCompensation: Our framework is built on fairness and transparency, with regular reviews to reflect growth and performance. \n\nBenefits: Share options, pension, and private medical insurance. \n\nCulture: A deep-tech rocketship backed by leading investors. We’re building breakthrough technology with real commercial impact. Pace is high. Standards are higher.\n\nZero Point Motion is determined to foster belonging and empowerment at work. We are committed to providing a work environment where there’s a zero-tolerance approach to discrimination, and everyone is treated with respect. Equity, diversity and inclusion are central to our mission, and we strongly encourage candidates of all different backgrounds and identities to apply. If you need assistance or an accommodation due to a disability, please contact us.","description_format":"text","description_chars":5244,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":["Equity","Health insurance","Stock options"],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Electrical & Electronic Engineering","Hardware","Sensors & Transducers","Optical Communications"],"lifecycle":[{"event":"open","at":"2026-10-02T16:47:44Z"}],"visa":[],"liveness":{"score":6,"band":"cold","label":"Long shot","p_open":1,"p_active":0.198,"p_room":0.28,"age_days":275,"expected_fill_days":33,"reasons":["conf:2","win:tail","crowd:"],"computed_at":"2026-10-12T06:55:09Z"},"pay":null,"html_url":"https://alion.io/job/zero-point-motion-fpga-verification-control-systems-engineer","json_url":"https://alion.io/job/zero-point-motion-fpga-verification-control-systems-engineer.json","meta":{"generated_at":"2026-10-13T01:27:02Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":2159,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-14T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":3798709},"rest":"https://alion.io/mcp/rest/get_company?id=3798709"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fzero-point-motion-fpga-verification-control-systems-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fzero-point-motion-fpga-verification-control-systems-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fzero-point-motion-fpga-verification-control-systems-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/zero-point-motion-fpga-verification-control-systems-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fzero-point-motion-fpga-verification-control-systems-engineer"}]}