Salary
≈ $70k – $166k per year (Estimated)
Location
Remote/Hybrid (Southampton, United Kingdom)
Seniority
Senior
Employment
Full-Time
Overview
Company
Impact
Profile match
Our RTL team delivers efficient ASIC and FPGA implementations of advanced communications algorithms, working across IP development, integration and verification. To support this work, we are looking for a Senior Verification Engineer to support the complete UVM verification of Accelercomm IP.
Purpose
Responsible for verification of RTL implementations for advanced wireless communications IP and modem subsystems, ensuring designs meet functional, performance and quality requirements prior to FPGA deployment and ASIC tape-out.
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