Post-Silicon Validation — FPGA

Job Details:

Job Description:

Role summary

Support FPGA-based post-silicon validation: design bring-up, hardware testing (PVT and non-PVT),regression, anddesign/test automation. Build hands-on skill in lab HW, scripting, and RTL-aware debug under senior guidance.

Key responsibilities

• Execute FPGA post-silicon validation plans: functional, feature,regression, and stress
• Supportdesign bring-up: power-on, clocks, reset, link-up, and basic feature checks
• RunPVT testing(voltage / temperature / corner sweeps) and non-PVT HW tests
• Execute and maintainregressionsuites (manual and automated); triage failures and re-run as needed
• Develop and maintaindesign/test automationusingPython,Tcl, andCas needed
• Read and useRTLfor debug, signal tracing, and understanding expected behavior
• Use FPGA tools and lab instruments for HW bring-up and failure isolation
• File clear bugs with logs, setups, and repro steps
• Work with design, DV, and related teams on triage and closure
• Document procedures, automation, regression results, and status

oft skills

• Methodical, lab-safe, eager to automate repetitive validation and regression work

• Quick learners; owns assigned test, regression, and automation tasks

Qualifications:

Required qualifications

• B.E. / B.Tech / M.S. in ECE, EE, Computer Engineering, or related
• 3-5 years in post-silicon validation, FPGA validation, HW test, or related
• HW knowledge:digital fundamentals, FPGA/SoC basics, lab bring-up comfort
• Experience or coursework exposure totest execution / regression(lab or simulation)
• Automation:practicalPythonfor test/lab automation and regression runs
• Scripting / embedded:TclandCfor tool flows, firmware-style, or board/test control
• RTL:ability to read Verilog/SystemVerilog (or VHDL) and relate failures to design behavior
• Familiarity with FPGA flows (compile, program, basic on-chip debug)
• Clear written communication for bugs and status

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