Verification Engineer, Graviton Team

Annapurna Labs, is the team behind AWS Graviton- the industry's most advanced ARM-based server SoC.

We operate like a start-up with the scale of the world's largest cloud provider.

We're looking for exceptional engineers to join our Pre-Silicon Verification team - the team that sits at the very center of the chip development lifecycle. Verification at Annapurna Labs isn't a downstream checkpoint - it's the connective tissue that spans the entire product journey:

• It starts at product definition - we engage from day one, shaping requirements and translating product intent into verification strategies before a single line of RTL is written
• It extends into software - we work side-by-side with SW teams, verifying hardware-software interfaces and ensuring seamless integration across the stack
• It reaches into physical design - we verify physical design aspects within functional verification, bridging the gap between logical correctness and silicon reality
• It closes the loop - from spec to silicon, our verification touches every team and every stage of chip development What sets us apart:
• Agentic AI is embedded in our workflow - not as an experiment, but as a core part of how we design and verify chips
• Cutting-edge methodologies drive every stage of our verification process
• Relentless innovation - we don't settle; we actively seek new approaches that raise the bar on silicon quality
• We do classic functional verification(SV/UVM/TLM), but beyond that, we touch physical design aspects, to ensure that the quality of our silicon is beyond logical functionality.
• Performance optimization at all levels it is at the heart of our targets on top of logical correctness verification. If you want to be at the nerve center of chip development - where your work connects every discipline and powers the backbone of AWS Graviton - this is your team.

Basic qualifications

- Electrical/Computer Science engineer

- 5+ years of experience with RTL verification

- Knowledge of Hardware Verification concepts and tools (UVM , Coverage Driven verification),

- Sound understanding and knowledge of object-oriented programming concepts, Verilog/SystemVerilog/Specman

Preferred qualifications

- Knowledge of the following programming languages: Perl/Bash/TCl/Python/

- Knowledge of PCIe, Processors, Ethernet, DDR

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