Electrical Engineering Graduate
Confirmed on the employer's own hiring board on Oct 17, 2026. First seen by Alion on Apr 27, 2026. Amazon scores A on the Alion truth index.
Annapurna Labs, a fabless semiconductor company founded by industry veterans, operates as part of Amazon Web Services (AWS). We develop leading-edge semiconductor products that power Amazon's cloud infrastructure.
As a startup-like organization within AWS, we create technologies that drive the world's largest cloud provider. Our engineers work with cutting-edge technologies to innovate and shape the future of cloud computing. At Annapurna Labs, you'll experience a fast-paced environment that offers continuous learning opportunities and the chance to develop next-generation platforms.
Are you ready to join us?
Watch these videos to learn more about Annapurna Labs and the Graviton project.
AWS re:Invent 2025 - Keynote with Peter DeSantis and Dave Brown: https://www.youtube.com/watch?v=JeUpUK0nhC0
AWS re:Invent 2025 - AWS Graviton https://www.youtube.com/watch?v=haSHl2BLhm8
Reducing design for test (DFT) effort with Tessent Streaming Scan Network (SSN) - Dan Trock, Amazon https://www.youtube.com/watch?v=CYpqna1ac-4
AMAZON WEB SERVICES - Deterministic In-fleet Scan Test in AWS Cloud https://www.youtube.com/watch?v=Wi7WUZ2-OAk
Key job responsibilities
DFT Three-Month Training Program
Design for Testability - From Architecture to Silicon
Delivered by our best technical experts and team leaders
Preparing you to work on extremely challenging SoC projects powering AWS fleet for the most advanced compute, networking and AI models
YOUR LEARNING JOURNEY
-Architecture & Strategy:
Develop and implement comprehensive DFT architectures and testability strategies for complex SoC designs across multiple product lines.
-Design:
Create design solutions for testability, debuggability, reliability, and yield improvement.
-Physical Implementation:
Contribute to physical implementation flows - from design constraints to layout-aware DFT integration and manufacturing readiness.
-Verification & Sign-off:
Build a detailed verification plan for all DFT disciplines, drive and track execution through verification and sign-off milestones.
-Silicon Activities:
Gain hands-on with silicon bring-up, reliability testing, and support advanced silicon physical failure analysis using DFT methodologies.
Basic qualifications
- B.Sc. in Electrical/Computer Engineering. Make sure to include a grade sheet with your CV in a single PDF
- Demonstrated academic performance
- Curious graduates or students in their 8th semester, willing to work in a full-time position
Preferred qualifications
- Experience in Chip Design/ DFT/ Design Verification
- Knowledge of Verilog and System Verilog
- Familiarity with Universal Verification Methodology (UVM)
- Strong scripting and programming skills
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