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Salary
$140k – $250k per year
Location
Hybrid (Santa Clara, Austin, United States)
Seniority
Staff · 10+ years exp
Employment
Full-Time

Confirmed on the employer's own hiring board on Oct 16, 2026. First seen by Alion on Oct 15, 2026.

Overview
Company
Impact
Profile match
NUVACORE is designing a new general-purpose CPU core for the sustained, intensive demands of AI infrastructure and agentic computing, not the workloads of the past.
Backed by Sequoia Capital

Nuvacore is building a ground-up high performance, low-power CPU for next-generation compute workloads. We are seeking a highly skilled and motivated Hardware Board Design Engineer to drive the architecture, design, and development of next-generation, high-performance, and energy-efficient CPU server solutions for data center applications. In this role, you will be responsible for the end-to-end hardware development life cycle, from initial concept and feasibility studies to schematic capture, PCB layout oversight, component selection, and laboratory brings-up. You will collaborate closely with cross-functional teams-including Package Design, Signal/Power Integrity (SI/PI), Thermal/Mechanical Engineering, and Software/Firmware-to deliver robust, scalable, and cutting-edge system platform hardware.

ROLE

  • Board-Level Architecture & Design: Lead the design and development of complex, multi-layer, high-density interconnect (HDI) server motherboards, baseboards, and riser cards optimized for data center workloads.
  • Schematic Capture & Component Selection: Ownership of schematic entry, creation of complex hierarchical designs, and rigorous component selection prioritizing power efficiency, thermal performance, and long-term reliability.
  • Layout Collaboration: Work hand-in-hand with PCB layout engineers to define board stack-ups, routing constraints, component placement, and shielding strategies.
  • Cross-Functional Alignment: Collaborate tightly with the Silicon, Package Design, and SI/PI teams to implement optimal co-design methodologies for high-speed interfaces (e.g., PCIe Gen6/Gen7, DDR5/LPDDR6, CXL) and robust power delivery networks (PDN).
  • Power & Thermal Management: Design highly efficient, high-current power delivery paths (VRMs, multiphase buck converters) capable of supporting ultra-high-power CPUs while meeting strict data center energy-efficiency metrics.
  • Bring-up, Validation, & Debug: Lead the hands-on hardware bring-up, debugging, and validation of prototype boards in the lab using high-speed oscilloscopes, logic analyzers, and specialized test equipment.
  • Manufacturing Support: Generate comprehensive fabrication and assembly documentation (Gerbers, BOMs, ODB++). Partner with fabrication houses and EMS partners to resolve DFM/DFA/DFT issues and ensure smooth mass production transitions.

REQUIREMENTS - MUST HAVE

  • Education: Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related technical field.
  • Experience: 5+ years of professional experience in high-speed hardware board design, ideally focused on enterprise servers, data center hardware, or complex computing platforms.
  • EDA Tools: High proficiency in industry-standard schematic capture and PCB layout tools (e.g., Cadence Allegro, Concept HDL, OrCAD, or Altium Designer).
  • High-Speed Design Knowledge: Direct experience designing with high-speed serial/parallel interfaces (such as PCIe, DDR/LPDDR, or USB) and understanding basic SI/PI constraints.
  • Power Delivery: Proven experience with board-level power distribution design, DC-DC converters, and multi-phase VRMs supporting high-current rails.
  • Lab Skills: Strong hands-on laboratory experience with hardware debugging, rework, and using diagnostic equipment (DMMs, scopes, network analyzers).

REQUIREMENTS - NICE TO HAVE

  • Education: Master’s degree in Electrical Engineering or Computer Engineering.
  • Advanced Data Center Experience: 10+ years deep understanding of data center server architectures, OCP (Open Compute Project) standards, and system topologies (e.g., CPU sockets, high-speed riser configurations, and BMC sub-systems).
  • Silicon-Package-Board Co-Design: Familiarity with the interplay between advanced semiconductor packaging (e.g., chiplets, 2.5D bridges) and high-density PCB implementation.
  • Simulation & Modeling: Familiarity with SI/PI and thermal simulation concepts using tools such as Ansys (SIwave, HFSS), Cadence Sigrity, or HyperLynx to guide early-stage design constraints.
  • Manufacturing Integration: Strong background in optimizing layouts for high-volume manufacturing, minimizing layer counts while maintaining performance, and handling DFX (Design for Manufacturing/Assembly/Test) validation.
  • Self-Driven & Collaborative: Excellent communication and cross-functional collaboration skills, with the ability to thrive in a fast-paced, startup-like environment.
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