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Mixed Signal Engineer Intern

Ambarella • Artificial Intelligence • Hardware • Master's Degree • Verilog • 25 days ago
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Salary
≈ $89k – $256k per year (Estimated)
Location
In office (United States)
Seniority
Intern
Employment
Internship

Confirmed on the employer's own hiring board on Oct 2, 2026. First seen by Alion on Sep 9, 2026. Ambarella scores B on the Alion truth index.

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Ambarella

Ambarella's advanced imaging solutions make cameras smarter by extracting valuable data from high-resolution video streams.
ambarella.com • Shanghai • Shenzhen • Hsinchu • Hardware • Artificial Intelligence • Processors, MCUs & AI Chips
Tech stack of Ambarella
Backed by Matrix, DAG Ventures

AI Vision Processors For Edge Applications

Our solutions make cameras smarter by extracting valuable data from high-resolution video streams.

Job Description

Job description:

As a member of the Mixed Signal team, the candidate will work with senior circuit designers in the design, validation and characterization of mixed signal and analog IP blocks for SOC. The IPs include PLL, DLL, SERDES, high speed IO and data converters, etc. for sub-14nm technologies. The candidate will have exposure to a broad range of circuit and technologies.

Qualification:

  • Strong fundamental in analog integrated circuit design
  • Good knowledge of digital logic design, including Verilog coding
  • Excellent communication skills
  • Lab skill is a plus
  • Knowledge on signal integrity is a plus
  • MS or PH.D. in electrical engineering
  • Will also consider summer interns
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