1,979,292open jobs
116,735companies
253,610added this week
Browse all
Salary
≈ $111k – $209k per year (Estimated)
Location
In office (Santa Clara)
Seniority
Senior · 5+ years exp
Visa
No sponsorship (stated in the posting)

Confirmed on the employer's own hiring board on Oct 25, 2026. First seen by Alion on Oct 22, 2026. AMD scores B on the Alion truth index.

Overview
Company
Impact
Profile match

AMD

AMD is an American semiconductor company founded in 1969 and headquartered in Santa Clara, California, that designs processors, graphics chips and adaptive computing hardware without owning fabrication plants. Its Ryzen and Threadripper processors and Radeon graphics serve consumers and creators, EPYC server chips have taken a large share of the data centre market from Intel, and the Instinct accelerators compete for AI training and inference workloads. The 2022 acquisition of Xilinx added field-programmable gate arrays and adaptive systems on chip, and the company also supplies the custom silicon inside the PlayStation and Xbox consoles.

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future.

Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger - technology that moves the world forward. Join us and, together, we’ll advance your career.

THE ROLE

The High-Speed IO (HSIO) Validation Engineer is responsible for validating and debugging high-speed interfaces across CPU and GPU platforms spanning data center servers and AI systems. In this role, you will work closely with PHY design, SI/PI, firmware, and platform teams to execute validation plans, characterize interface performance, and drive root-cause analysis of silicon- and system-level issues. You will play a key role in ensuring product quality and readiness for industry-leading technologies.

WHAT YOU WILL BE DOING

  • Execute validation plans for high-speed IO interfaces such as PCIe Gen5/Gen6/Gen7, UALink, xGMI, Ethernet, and other emerging technologies.
  • Support post-silicon bring-up, characterization, compliance testing, margining, and interoperability validation across multiple platforms.
  • Collaborate with design, architecture, firmware, board, and test teams to investigate and resolve high-speed interface issues.
  • Develop and enhance test automation, validation scripts, and data analysis tools to improve validation efficiency and coverage.
  • Perform electrical- and protocol-level debug using oscilloscopes, BERTs, protocol analyzers, and other lab equipment.
  • Analyze signal integrity, power integrity, and link training behavior to identify root causes and drive corrective actions.
  • Document validation findings, debug results, and recommendations, and communicate status to project stakeholders.
  • Contribute to the continuous improvement of validation methodologies, best-known methods (BKMs), and lab infrastructure.

WHO WE ARE LOOKING FOR

  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related technical field with 5+ years of experience in high-speed IO, silicon validation, system validation, or related areas.
  • Experience with high-speed serial interfaces such as PCIe, CXL, Ethernet, UALink, or similar technologies.
  • Strong understanding of signal integrity concepts, channel characteristics, equalization techniques (CTLE, DFE, TX FIR), and link-level behavior.
  • Experience with lab bring-up, validation, and debug using high-speed measurement equipment such as oscilloscopes, BERTs, VNAs, and protocol analyzers.
  • Strong programming and scripting skills in Python, C/C++, or similar languages for automation and data analysis.
  • Familiarity with silicon bring-up, compliance testing, and system-level debug methodologies.
  • Strong analytical and problem-solving skills with the ability to drive technical issues to resolution.
  • Effective communication and collaboration skills within cross-functional engineering teams.

PREFERRED QUALIFICATIONS

  • Experience validating server, AI, networking, or accelerator platforms.
  • Experience with PCIe, Ethernet, UALink, or other high-speed interface compliance and interoperability testing.
  • Experience developing automated validation frameworks and data analysis workflows.
  • Contributions to technical publications, patents, industry standards, or internal best-known methods (BKMs).

Strong commitment to quality, innovation, teamwork, and continuous improvement.

ACADEMIC CREDENTIALS:

  • Bachelor’s, Master’sor PhD degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent

Location

Santa Clara, CA

This role is not eligible for visa sponsorship.

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

THE ROLE

The High-Speed IO (HSIO) Validation Engineer is responsible for validating and debugging high-speed interfaces across CPU and GPU platforms spanning data center servers and AI systems. In this role, you will work closely with PHY design, SI/PI, firmware, and platform teams to execute validation plans, characterize interface performance, and drive root-cause analysis of silicon- and system-level issues. You will play a key role in ensuring product quality and readiness for industry-leading technologies.

WHAT YOU WILL BE DOING

  • Execute validation plans for high-speed IO interfaces such as PCIe Gen5/Gen6/Gen7, UALink, xGMI, Ethernet, and other emerging technologies.
  • Support post-silicon bring-up, characterization, compliance testing, margining, and interoperability validation across multiple platforms.
  • Collaborate with design, architecture, firmware, board, and test teams to investigate and resolve high-speed interface issues.
  • Develop and enhance test automation, validation scripts, and data analysis tools to improve validation efficiency and coverage.
  • Perform electrical- and protocol-level debug using oscilloscopes, BERTs, protocol analyzers, and other lab equipment.
  • Analyze signal integrity, power integrity, and link training behavior to identify root causes and drive corrective actions.
  • Document validation findings, debug results, and recommendations, and communicate status to project stakeholders.
  • Contribute to the continuous improvement of validation methodologies, best-known methods (BKMs), and lab infrastructure.

WHO WE ARE LOOKING FOR

  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related technical field with 5+ years of experience in high-speed IO, silicon validation, system validation, or related areas.
  • Experience with high-speed serial interfaces such as PCIe, CXL, Ethernet, UALink, or similar technologies.
  • Strong understanding of signal integrity concepts, channel characteristics, equalization techniques (CTLE, DFE, TX FIR), and link-level behavior.
  • Experience with lab bring-up, validation, and debug using high-speed measurement equipment such as oscilloscopes, BERTs, VNAs, and protocol analyzers.
  • Strong programming and scripting skills in Python, C/C++, or similar languages for automation and data analysis.
  • Familiarity with silicon bring-up, compliance testing, and system-level debug methodologies.
  • Strong analytical and problem-solving skills with the ability to drive technical issues to resolution.
  • Effective communication and collaboration skills within cross-functional engineering teams.

PREFERRED QUALIFICATIONS

  • Experience validating server, AI, networking, or accelerator platforms.
  • Experience with PCIe, Ethernet, UALink, or other high-speed interface compliance and interoperability testing.
  • Experience developing automated validation frameworks and data analysis workflows.
  • Contributions to technical publications, patents, industry standards, or internal best-known methods (BKMs).

Strong commitment to quality, innovation, teamwork, and continuous improvement.

ACADEMIC CREDENTIALS:

  • Bachelor’s, Master’sor PhD degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent

Location

Santa Clara, CA

This role is not eligible for visa sponsorship.

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

Free account
Stop reading job ads. Get the ones that fit.
One free account turns this page into a shortlist built around your stack, your level and your pay.
Match on every job. Stack, seniority, pay and location, scored against your profile.
1,979,292 open roles. Read straight off company career pages, refreshed every day.
Unlimited applications. Every one you send is tracked in one place, on-site or on a company board.
3 tailored CVs a month. Rewritten for the exact job you are applying to. Included free.
Create a free account Continue with Google
Free forever. No card. Under a minute.

Your match

How well do you fit this role?
Two answers are enough for a real match. No account needed.
Check my fit
Answers stay in this browser until you create an account.

Recommended for you based on this role

Industrial Engineering
Similar stack
Same company
Santa Clara
Systems Engineer 1 hour ago
$144k – $220k per year • In office • TS/SCI • 15+ years exp • High School Diploma • Aurora
Python
Bash
Databases
Amazon Aurora
DevOps
Puppet
Ansible
Azure
AWS
Docker
Kubernetes
Configuration Management
Windows
Management
Agile
Apply
Systems Engineer 1 hour ago
$104k – $150k per year • In office • TS/SCI • 7+ years exp • Bachelor's Degree • Annapolis Junction
Python
DevOps
AWS
Analytics
Apache NiFi
Management
Agile
Apply
Systems Engineer 1 hour ago
$152k – $200k per year • In office • TS/SCI • 14+ years exp • Bachelor's Degree • Annapolis Junction
Management
Agile
Defense
DoDAF
Apply
Sr. Systems Engineer 11 days ago
$161k – $185k per year • Equity • In office • Nationals only • Full-Time • 3+ years exp • Broomfield • Denver
Python
MATLAB
MATLAB
Simulink
Apply
$50k – $58k per year • In office • Secret • 4+ years exp • Dahlgren
Apply
$140k per year • In office • Full-Time • Santa Clara
Apply
$165k – $224k per year • Equity • In office • Full-Time • 3+ years exp • Bachelor's Degree • Santa Clara
Java
C#
C++
Perl
AI/ML
Qwen
vLLM
Gemma
SGLang
AWS Bedrock
LLM
CUDA
Amazon SageMaker
Speculative Decoding
Machine Learning
DevOps
AWS
Apply
$48k per year • In office • Part-Time • High School Diploma • Santa Clara
Apply
≈ $69k – $137k per year (Estimated) • In office • 3+ years exp • High School Diploma • Santa Clara
Apply
≈ $43k – $75k per year (Estimated) • In office • Part-Time • San Jose • Santa Clara • Sunnyvale • Cupertino • Mountain View
Apply
See all jobs
This is one of many
1,979,292 more open roles from verified company boards, updated every day.