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Salary
≈ $7.5k – $17k per year (Estimated)
Location
In office (Bengaluru)
Seniority
Junior · 2+ years exp

Confirmed on the employer's own hiring board on Nov 1, 2026. First seen by Alion on Oct 30, 2026. AMD scores A on the Alion truth index.

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AMD

AMD is an American semiconductor company founded in 1969 and headquartered in Santa Clara, California, that designs processors, graphics chips and adaptive computing hardware without owning fabrication plants. Its Ryzen and Threadripper processors and Radeon graphics serve consumers and creators, EPYC server chips have taken a large share of the data centre market from Intel, and the Instinct accelerators compete for AI training and inference workloads. The 2022 acquisition of Xilinx added field-programmable gate arrays and adaptive systems on chip, and the company also supplies the custom silicon inside the PlayStation and Xbox consoles.

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future.

Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger - technology that moves the world forward. Join us and, together, we’ll advance your career.

SENIOR PACKAGING ENGINEER

THE ROLE:

Help turn “possibility” into “reality” every day. At AMD, we push the boundaries of what is possible by delivering innovative, high-performance computing solutions across data center, AI, and advanced packaging technologies.

We are seeking a highly experienced Senior Package Design Engineer to support complex package design execution. This role requires a self-driven technical expert who thrives in a fast-paced, dynamic, and high-pressure environment, and can deliver high-quality designs with speed, precision, and scalability.

The successful candidate will play a key role in advancing AMD’s packaging methodologies by leveraging AI-driven design techniques, automation, and next-generation workflows to address the increasing complexity of heterogeneous integration and advanced packaging architectures.

THE PERSON:

The ideal candidate is an experienced package or silicon physical designer who:

  • Demonstrates strong ownership and accountability across multiple programs
  • Excels in fast-phase execution environments with competing priorities
  • Applies AI/ML and automation to improve design productivity and quality
  • Operates with minimal supervision while influencing cross-functional teams
  • Balances deep technical expertise with strong collaboration and communication skills

KEY RESPONSIBILITIES:

Design Execution & Technical Leadership

  • Perform end-to-end package design execution for complex products, ensuring performance, cost, quality, and schedule targets are met
  • Handle multiple concurrent design programs in a fast-paced and high-pressure environment
  • Develop substrate layouts, bump maps, and interposer designs for advanced packaging (2.5D/3D, chiplet-based architectures)
  • Drive design decisions through close collaboration with SI/PI, mechanical, and SOC teams

Cross-Functional Collaboration

  • Partner with internal engineering teams, OSATs, and substrate suppliers to deliver optimized solutions
  • Interface with stakeholders to communicate design status, risks, and mitigation strategies
  • Contribute to design reviews, signoff readiness, and tapeout processes

Methodology & Continuous Improvement

  • Define and enhance package design methodologies, flows, and best practices
  • Drive improvements in layout efficiency, reuse, and design standardization

PREFERRED EXPERIENCES:

  • Minimum 2+ years of experience in designing complex substrate design or Silicon Bridge or Interposers
  • Proven ability to execute in multi-project, fast-phased, and high-pressure environments
  • Strong experience in advanced packaging technologies:
    • 2.5D / 3D integration (e.g., interposers, chiplets)
  • Hands-on experience with EDA tools such as:
    • Cadence SIP / APD
    • Synopsys 3DICC or equivalent
  • Experience working with OSATs, foundries, and substrate vendors
  • Solid understanding of Signal Integrity and Power Integrity fundamentals

ACADEMIC CREDENTIALS:

  • Bachelor’s or higher degree in Electrical Engineering, Computer Engineering, or related field

LOCATION:

Bangalore, India

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

SENIOR PACKAGING ENGINEER

THE ROLE:

Help turn “possibility” into “reality” every day. At AMD, we push the boundaries of what is possible by delivering innovative, high-performance computing solutions across data center, AI, and advanced packaging technologies.

We are seeking a highly experienced Senior Package Design Engineer to support complex package design execution. This role requires a self-driven technical expert who thrives in a fast-paced, dynamic, and high-pressure environment, and can deliver high-quality designs with speed, precision, and scalability.

The successful candidate will play a key role in advancing AMD’s packaging methodologies by leveraging AI-driven design techniques, automation, and next-generation workflows to address the increasing complexity of heterogeneous integration and advanced packaging architectures.

THE PERSON:

The ideal candidate is an experienced package or silicon physical designer who:

  • Demonstrates strong ownership and accountability across multiple programs
  • Excels in fast-phase execution environments with competing priorities
  • Applies AI/ML and automation to improve design productivity and quality
  • Operates with minimal supervision while influencing cross-functional teams
  • Balances deep technical expertise with strong collaboration and communication skills

KEY RESPONSIBILITIES:

Design Execution & Technical Leadership

  • Perform end-to-end package design execution for complex products, ensuring performance, cost, quality, and schedule targets are met
  • Handle multiple concurrent design programs in a fast-paced and high-pressure environment
  • Develop substrate layouts, bump maps, and interposer designs for advanced packaging (2.5D/3D, chiplet-based architectures)
  • Drive design decisions through close collaboration with SI/PI, mechanical, and SOC teams

Cross-Functional Collaboration

  • Partner with internal engineering teams, OSATs, and substrate suppliers to deliver optimized solutions
  • Interface with stakeholders to communicate design status, risks, and mitigation strategies
  • Contribute to design reviews, signoff readiness, and tapeout processes

Methodology & Continuous Improvement

  • Define and enhance package design methodologies, flows, and best practices
  • Drive improvements in layout efficiency, reuse, and design standardization

PREFERRED EXPERIENCES:

  • Minimum 2+ years of experience in designing complex substrate design or Silicon Bridge or Interposers
  • Proven ability to execute in multi-project, fast-phased, and high-pressure environments
  • Strong experience in advanced packaging technologies:
    • 2.5D / 3D integration (e.g., interposers, chiplets)
  • Hands-on experience with EDA tools such as:
    • Cadence SIP / APD
    • Synopsys 3DICC or equivalent
  • Experience working with OSATs, foundries, and substrate vendors
  • Solid understanding of Signal Integrity and Power Integrity fundamentals

ACADEMIC CREDENTIALS:

  • Bachelor’s or higher degree in Electrical Engineering, Computer Engineering, or related field

LOCATION:

Bangalore, India

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

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