CAD Automation and Mixed-Signal Simulation Engineer
Confirmed on the employer's own hiring board on Oct 30, 2026. First seen by Alion on Aug 27, 2026. Apple scores A on the Alion truth index.
Do you want to help build future generations of processors that will enable the next remarkable Apple innovation? If so, we invite you to consider joining our team. We are seeking an engineer with a passion for hardware and strong CAD flow development and collaboration skills. You will develop, maintain, and enhance AMS (Analog/Mixed-Signal) simulation methodology and tools for our analog, RF, interconnect, PMIC, and memory design teams. You will gain hands-on experience in circuit analysis, pre and post-layout simulation, RTL simulation, behavioral modeling, analog+digital co-simulation, logic equivalency checks, and signoff. You will enable design engineers to efficiently drive and interact with their mixed-signal simulations and design verification workflows, delivering validated IP in cutting-edge silicon. The successful candidate will thrive in dynamic, multi-disciplinary environments and demonstrate a hands-on, enthusiastic, and self-motivated approach. If you are passionate about delivering exceptional value to users and paying meticulous attention to detail, this role may be the perfect fit for you. Your contributions will directly impact the experiences of millions of Apple customers by delivering state-of-the-art processors across the diverse range of Apple products.
Description
As a member of our CAD team, you will architect, develop, maintain and enhance AMS (Analog/Mixed-Signal) simulation methodology and solutions for our analog, RF, and mixed-signal designs. The role requires you to work with different technology nodes and provide flows/methodologies for the different tool sets. You will be collaborating closely with design teams. You will drive and coordinate efforts to develop and validate AMS/co-simulation flows, providing ease of use, speeding up design validation, and ensuring functional silicon.
Minimum Qualifications
Bachelor's degree in Computer Science, Electrical Engineering, Computer Engineering, or related field +0 years of experience
Experience in Python, Perl, or TCL programming
Experience using mixed-signal co-simulation tools
Preferred Qualifications
Experience with industry-standard AMS tools including Cadence (Xcelium, Verisium/Indago, SimVision, AMS Designer), Synopsys (VCS, Verdi), or Siemens (Questa, Symphony)
Familiarity with analog simulation tools such as Cadence Spectre, Synopsys PrimeSim/HSPICE/Finesim, or Siemens AFS
Ability to identify and address simulation accuracy, speed, and capacity issues
Experience with mixed-signal simulation implementation including discipline resolution, binding, IE setup, Connect Modules, AMSD blocks, wreal, TCL probes, real number modeling, UDNs, etc.
Understanding of behavioral and functional circuit description languages including SystemVerilog, VerilogA, Verilog, Verilog-AMS, VHDL
Familiarity with applying LLMs/AI agents to CAD software development, test generation, and debugging
Understanding of custom IC designs and transistor description formats (SPICE, DSPF, schematics)
Fundamentals in object-oriented programming, data structures, algorithms, system architecture, command-line and GUI interaction, testing/coverage, and revision control
Familiarity with Virtuoso Schematic Editor, PDK content, CDF properties, hierarchy editor, SKILL code, netlisting, and Analog Design Environment (ADE)
Strong communication and presentation skills
Demonstrated commitment to quality and productivity