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Salary
≈ $227k – $419k per year (Estimated)
Location
In office (Austin)
Seniority
Architect · 20+ years exp
Visa
H-1B filings in 12 months: 6,350 · for this role: 1,366 · green card filings: 37

Confirmed on the employer's own hiring board on Oct 31, 2026. First seen by Alion on Aug 26, 2026. Apple scores A on the Alion truth index.

Overview
Company
Impact
Profile match
Apple is an American multinational technology company founded in 1976 by Steve Jobs, Steve Wozniak and Ronald Wayne, and headquartered in Cupertino, California. It designs and sells consumer hardware including the iPhone, Mac, iPad, Apple Watch, AirPods and Vision Pro, together with the operating systems and silicon that run them. A growing services division built around the App Store, iCloud, Apple Music, Apple TV+ and Apple Pay now contributes a large share of profit, making Apple one of the most valuable companies in the world.

Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products! The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver groundbreaking Apple products!

Apple’s Silicon Engineering Group (SEG) designs high-performance, low power microprocessors that power our innovative products, including the iPhone, iPad, Watch, Vision Pro, and Mac. We are looking for an experienced engineer to drive architecture and RTL development of next generation CPUs.

Description

As a RTL Engineer, you will own or participate in the following:

  • Microarchitecture development and specification - from early high-level architectural exploration through micro architectural research and arriving at a detailed specification
  • RTL feature ownership - development, assessment and refinement of new RTL features to target power, performance, area and timing goals
  • Validation - support test bench development and simulation for functional and performance verification
  • Performance exploration and correlation - explore high performance strategies and validate that the RTL design meets targeted performance
  • Design delivery - work with multifunctional engineering team to implement and validate physical design on the aspects of timing, area, reliability, testability, and power

Minimum Qualifications

Minimum BS and 20+ years of relevant industry experience

Experience with microprocessor architecture

Experience with Verilog or VHDL

Preferred Qualifications

Knowledge of logic design principles

Expertise with one or more of the following areas: instruction fetch and decode, branch prediction, instruction scheduling, register renaming, out-of-order execution, integer and floating point execution, load/store execution, or cache and memory subsystems

Understanding of timing, power and area tradeoffs in CPU microarchitecture

Understanding of low power and high performance microarchitecture techniques

Experience using an interpretive language such as Perl or Python

Experience with simulators and waveform debugging tools such as Verdi

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