WiFi MAC Design Verification Engineer
Confirmed on the employer's own hiring board on Nov 4, 2026. First seen by Alion on Nov 3, 2026. Apple scores A on the Alion truth index.
The Apple ecosystem harnesses multiple wireless technologies to deliver an unparalleled user experience. The Wireless Connectivity Silicon (WCS) team spearheads the development of complex System-on-Chip (SoCs) like the N1 family, enabling this experience in both current and future Apple products. By leveraging cutting-edge processes, tools, workflows, unique proprietary features, and advanced architecture, the team strives to provide the best wireless connectivity solutions. The WCS organization anticipates substantial growth to meet the diverse silicon tape-outs for various product lines at Apple in the coming years. This presents significant growth opportunities for building new infrastructure. If you’re passionate about wireless technologies, eager to work on next-generation infrastructure, and committed to continuous learning, this is the ideal place for you.
Description
As a Wireless MAC Design Verification Engineer, you’ll be instrumental in our WCS group’s verification initiatives, ensuring that our products incorporate cutting-edge Wi-Fi technology while maintaining high quality and reliability. We’re looking for candidates with hands-on experience in the entire ASIC design verification cycle, preferably with expertise in reusable verification methodologies like UVM or similar. This position offers excellent opportunities to deepen your knowledge of Wi-Fi protocols, complex IP and subsystems, and fabric protocols. You’ll also be collaborating closely with system architects, design, software, and firmware teams. The ideal candidate will excel in detailed test planning, adapt to evolving requirements, build test bench infrastructure, perform regressions, close coverage, and leverage various AI tools to streamline DV processes and expedite debugging. Prior knowledge of wireless domain or MAC verification is a plus. If you’re passionate about contributing to products that have a global impact and want to advance your technical expertise, we’d love to hear from you.
Minimum Qualifications
BS and a minimum of 10 years relevant industry experience.
Advanced Knowledge of standard ASIC design and verification flows.
Proven track record in leading the verification methodology for clusters, subsystems, or full-chip level designs.
Deep proficiency in OOP, SystemVerilog, UVM.
Strong analytical and problem-solving skills, with the ability to debug complex design issues effectively.
Preferred Qualifications
Knowledge of Wireless Connectivity or MAC verification.
Experience using AI-based tools for verification (e.g., Claude Code or similar) to improve efficiency and automation.
Highly motivated, ambitious, and eager to collaborate effectively in a dynamic and fast-paced work environment.