Senior Analog IC Design Engineer
Confirmed on the employer's own hiring board on Oct 24, 2026. First seen by Alion on Jun 30, 2026. Arago scores B on the Alion truth index.
Meet Arago and the Aragonians
Arago is an AI and computer hardware company whose mission is to drive the course of history forward. We do so by accelerating breakthroughs at the intersection of AI and semiconductors.
Founded in 2024 by AI researchers and physicists with deep expertise in photonics, electronics, software, mathematics, and machine learning, Arago brings together a lean team of engineers and scientists from the world’s top companies and research labs.
Composed of nine nationalities and operating from hubs in France, North America, and Israel, we believe in great science and fast achievements. Our work is guided by these core principles:
Do great things: we deliver work we’re proud to sign our name to.
High velocity: speed matters. We move quickly, one step at a time.
One unit: we’re all in this together, with relationships grounded in trust, respect, and camaraderie.
Arago is backed by executives from Apple, Arm, Nvidia, Microsoft, and Hugging Face, as well as prominent US and European deeptech venture firms and exited founders.
What you’ll do
Design high-performance analog and mixed-signal ICs optimized for precision, power, and area, driving Arago’s prototype and product iterations from architecture to silicon validation.
Responsibilities
Design and simulate analog and RF integrated circuits, including critical blocks such as amplifiers, mixers, PLLs, ADCs, DACs, and bias/reference circuits, with a focus on signal integrity, linearity, and precision.
Optimize circuits for power, area, and performance trade-offs, ensuring designs meet system-level requirements across process, voltage, and temperature (PVT) variations.
Collaborate closely with optics, simulation and PCB teams to define architecture and block-level specifications for Arago’s successive prototypes and product iterations, ensuring tight alignment with overall performance and integration goals.
Work with layout engineers to guide floor-planning and physical design, minimizing parasitic effects and preserving analog precision in layout-sensitive blocks.
Support post-silicon validation and bring-up, defining test plans, analyzing lab measurements, and correlating results with simulation to refine future design iterations.
Language: English at a proficient level. French is a plus.
Required Skills and Experience
A sound mathematical understanding and deep physical intuition of analog electronics, as well as analog voltage-to-current and current-to-voltage conversion at low and high frequencies.
Experience in designing high-precision analog systems for signal processing or power electronics. Experience working with high-frequency analog signals is valued.
Extensive experience in IC design and post-layout design methodology using standard industry tools like Cadence Virtuoso.
Proficiency in designing and optimizing mixed-signal circuits, including DACs and ADCs at low (kHz-MHz) and high (>GHz) frequencies, and signal conditioning circuits, ensuring flawless integration between analog RF components and digital processors.
Strong understanding of signal integrity, crosstalk, and noise reduction techniques in mixed-signal environments, particularly in high-frequency RF systems interfacing with digital processors.
Advanced node experience required (<28nm>
Pay and benefits
Competitive cash compensation, with final package based on location, experience, and the pay of team members in similar positions.
Meaningful stock option plan offered at the earliest stage of the company (included in the majority of full time offers).
Relocation bonus and coverage of moving expenses for relocation within 20 minutes of the company’s location.
Healthcare coverage (including family-friendly options), pension contributions, professional development support, and 25 days of PTO, in addition to public holidays.
Ownership of a key technical domain, with significant vertical and/or horizontal growth opportunities, based on performance and individual drive.
Reimbursement of 50% of the public transport subscription fee.
A high-paced, multicultural (with 9 nationalities), and engineering-led environment.