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Salary
≈ $16k – $39k per year (Estimated)
Location
Hybrid (Bengaluru, India)
Seniority
Senior · 12+ years exp

Confirmed on the employer's own hiring board on Oct 11, 2026. First seen by Alion on Sep 24, 2026. Arm Holdings scores B on the Alion truth index.

Overview
Company
Impact
Profile match
Arm Holdings is a British semiconductor and software design company headquartered in Cambridge, England. Rather than manufacturing physical chips directly, Arm designs energy-efficient central processing unit (CPU) architectures and intellectual property (IP), licensing them to major technology partners such as Apple, Qualcomm, Samsung, and Nvidia.

We are seeking a highly experienced ASIC Physical Design Engineer with 12+ years of hands-on expertise in full-chip and hierarchical SoC physical design.

This role requires deep technical expertise in advanced technology nodes, strong problem-solving capability, and leadership in driving chip closure from netlist to GDSII.

Job Overview:

Responsibilities:

  • Lead chip-level hierarchical floor planningand block-level integration.

  • Drive partitioning strategy, partition push-down, and hierarchical design implementation.

  • Own pin planning, IO planning, bump planning, and bump routingfor complex SoCs.

  • Define and execute power planning(ring/mesh/grid architecture, multi-domain handling).

  • Perform and manage full-chip CTSand clock architecture optimization.

  • Lead chip integrationactivities across multiple blocks and subsystems.

  • Execute and sign off physical verification(DRC, LVS, ERC, ESD, antenna, etc.).

  • Handle ESD planning and implementationat chip level.

  • Drive full-chip closure including congestion, IR/EM, timing, and noise analysis.

  • Collaborate closely with RTL, synthesis, STA, package, and backend teams.

  • Support tape-out activities and resolve last-mile issues.

  • Mentor junior engineers and provide technical guidance on chip-level challenges.

Required Skills and Experience :

Education:

  • Bachelor’s or Master’s degree in Electrical Engineering, Electronics, Microelectronics, or related field!

Mandatory Experience:

  • Chip-level hierarchical floor planning

  • Partitioning & partition push-down

  • Pin planning & IO planning

  • Bump planning & bump routing

  • ESD planning

  • Full-chip integration

  • Physical verification (DRC/LVS/ERC/Antenna), IR DROP, SI-Noise Signoff.

  • Full-chip CTS

  • Power planning (multi-voltage domains, UPF awareness)

  • Hands-on experience with leading EDA tools (e.g., Innovus, ICC2, Fusion Compiler, Tempus, PrimeTime, Calibre, etc.)

  • Experience in advanced nodes (5nm/3nm/2nm or similar preferred)

“Nice To Have” Skills and Experience :

  • Experience leading full-chip tape-outs.

  • Knowledge of packaging interactions and bump/IO co-design.

  • Ability to script and automate workflows using Python, TCL, or SKILL.

  • Familiar with Cadence/Synopsys/Mentor tools

Our 10x Mindset

At Arm, we believe progress happens when people are empowered to think bigger and push beyond what seems possible. Our 10x mindset is about curiosity, ambition and creating impact that will be used by millions. We learn fast, prioritise collaboration and turn bold ideas into real technology. We look for people who are inspired by this way of working and want to grow in an environment where bold ideas are welcomed. Discover how the 10x mindset shapes life at Arm: https://careers.arm.com/10x-mindset

Use of AI in Your Application

At Arm, we embrace the benefits AI can bring, including in recruitment. You may use AI to support your preparation, such as improving the clarity of written responses, practicing interview questions, or learning more about our industry. However, your application and interview responses must reflect your own thinking, experience, and abilities. We want to understand your authentic perspective, creativity, and approach to problem solving. As such, you may not use AI to complete assigned tasks as part of any assessments. If you plan to use AI-supported or assistive technologies as part of a reasonable adjustment, please contact [email protected] so we can support you.

Recruitment Adjustments and Accommodations

At Arm, we want to build extraordinary teams. If you need an adjustment or an accommodation during the recruitment process, please email [email protected]. To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation or adjustment requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud, or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process.

Hybrid Working

Arm’s approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility. Within that framework, we empower groups/teams to determine their own hybrid working patterns, depending on the work and the team’s needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you.

Equal Opportunities

Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don’t discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.

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