Staff Structural Test Verification/Simulation Engineer

Job Overview:

Arm is seeking a visionary and technical leader for a Staff Structural Test Verification/Simulation Engineer role in Bangalore. In this high-visibility position with 10+ years of experience, you will spearhead structural test, design-for-test (DFT), and test verification methodologies across advanced, world-class Arm products. You will act as a technical authority, ensuring flawless manufacturing test quality, high silicon yield, and robust fault coverage.

Key Responsibilities

• DFT Verification Leadership: Define and drive the comprehensive pre-silicon verification and simulation strategy for advanced logic and memory test architectures.
• Logic Diagnostics & ATPG: Drive the simulation of ATPG (Automatic Test Pattern Generation) patterns and logic diagnostics flows to guarantee fault coverage and defect detection.
• Memory Diagnostics & MBIST: Drive the simulation of MBIST (Memory Built-In Self-Test) controllers, memory repair algorithms, and memory diagnostics architectures.
• Tool & Standard Integration: Utilize industry-standard test methodologies and EDA tools (ICL, PDL, Tessent, and TetraMAX) to validate DFT insertions, boundary scan, and scan compression logic.
• Silicon Validation & Yield Debug: Bridge pre-silicon simulation with post-silicon testing, collaborating closely with manufacturing and test engineering teams on silicon validation and yield debug to root-cause failures and optimize test efficiency.

Required Qualifications & Experience

• Experience: 10+ years of extensive experience in design-for-test (DFT), structural test verification, or test engineering for complex ASICs/SoCs.
• Core DFT Skills:
• Expert-level understanding of Logic Diagnostics and ATPG pattern verification/simulation.
• Deep expertise in Memory Diagnostics and MBIST pattern verification/simulation.
• Ecosystem & Tool Proficiency: Hands-on mastery of industry-standard DFT languages and tools, including ICL (Instrument Connection Language), PDL (Procedure Description Language), Siemens Tessent, and Synopsys TetraMAX.
• Post-Silicon Execution: Demonstrated track record in silicon validation, ATE pattern bring-up, and yield debug for high-volume semiconductor manufacturing.
• Methodologies & Coding: Strong background in hardware verification languages (SystemVerilog/UVM) and scripting automation (Python, Perl, or Tcl).

Preferred Skills & Leadership

• Exceptional technical leadership, mentoring skills, and ability to drive cross-functional engineering execution across global sites.
• Deep knowledge of advanced process nodes (sub-7nm/5nm/3nm) and low-power DFT challenges.
• Experience with IJTAG (IEEE 1687) and boundary-scan (IEEE 1149.1/4) standards.

At Arm, we believe progress happens when people are empowered to think bigger and push beyond what seems possible. Our 10x mindset is about curiosity, ambition, and creating impact through technology used by millions.

Our 10x Mindset

At Arm, we believe progress happens when people are empowered to think bigger and push beyond what seems possible. Our 10x mindset is about curiosity, ambition and creating impact that will be used by millions. We learn fast, prioritise collaboration and turn bold ideas into real technology. We look for people who are inspired by this way of working and want to grow in an environment where bold ideas are welcomed. Discover how the 10x mindset shapes life at Arm: https://careers.arm.com/10x-mindset

Use of AI in Your Application

At Arm, we embrace the benefits AI can bring, including in recruitment. You may use AI to support your preparation, such as improving the clarity of written responses, practicing interview questions, or learning more about our industry. However, your application and interview responses must reflect your own thinking, experience, and abilities. We want to understand your authentic perspective, creativity, and approach to problem solving. As such, you may not use AI to complete assigned tasks as part of any assessments. If you plan to use AI-supported or assistive technologies as part of a reasonable adjustment, please contact [email protected] so we can support you.

Recruitment Adjustments and Accommodations

At Arm, we want to build extraordinary teams. If you need an adjustment or an accommodation during the recruitment process, please email [email protected]. To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation or adjustment requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud, or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process.

Hybrid Working

Arm’s approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility. Within that framework, we empower groups/teams to determine their own hybrid working patterns, depending on the work and the team’s needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you.

Equal Opportunities

Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don’t discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.