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Salary
$150k – $250k per year
Location
In office (Menlo Park)
Seniority
Senior · 5+ years exp
Visa
Filed H-1B visas in the last two years

Confirmed on the employer's own hiring board on Oct 31, 2026. First seen by Alion on Oct 30, 2026. AttoTude scores C on the Alion truth index.

Overview
Company
Impact
Profile match
AttoTude develops terahertz technology for data center networking, with an engine and wire product pairing designed to remove networking bottlenecks for artificial intelligence workloads. Its engineers design digital and mixed-signal chips and system hardware, and the company hires ASIC design engineers, materials scientists and fabrication technicians. The company is headquartered in Menlo Park, California, United States.

The Opportunity  

AttoTude'sworld-class engineering team works in a fast-paced, agile environment to develop next-generation baseband modems for intra-DCI applications. As a member of the system test team, the DSP Integration Test Engineer will own the bring-up, integration, and hardware maturity of high-speed DSPs coupled with AttoTude’sproprietary DiAxcable technology. The ideal candidate will be prepared to work with early prototypes, bringing up transmitand receiveDSP functions on hardwareand characterizingthe combined performance of AttoTude’s448Gbps/PAM4 AEC modules.A key componentof this role is the ability to understand and make tradeoffs across DSP, analog, and RF subsystems to optimizeoverall system performance and carry it through to volume production. The candidate should anticipatefrequent interactions with design engineers on signal processing and performance optimization. The role also includes designing, debugging, and optimizing firmware algorithms that maintainrobust performance over varying link conditions. 

Roles and Responsibilities  

The successful candidate will play a pivotal role in bringing AttoTude'snext-generation communications platform from prototypesto volume production. Responsibilities include: 

  • Hardware bring-up and maturationof high-speed DSP on prototype and production hardware, including transmitand receive data-path configuration, linkoptimization, troubleshootingand debug 
  • Characterize and optimizeTx and Rx DSP blocks, including feed-forward and decision-feedback equalizers, MLSE, clock (timing) recovery, and assess their performance, complexity, and power tradeoffs 
  • Measure high-speed DACs and ADCs (e.g., ENOB, SNDR, linearity, interleaving spurs, bandwidth, jitterand phase noise) and quantify their impact on modem SNR and BER 
  • Develop calibration methods and transfer them to automated manufacturing test 
  • Develop and test DSP-based control loops, including adaptation convergence, loop stability, tracking, and robustness over process, voltage, and temperature 
  • Analyze link performance (pre-FEC BER, SNR) and correlate measurements with system models 
  • Develop Python-based lab automation for test, characterization, and data analysis 
  • Drive performance validation and qualification, and transfer DSP configurations, calibrations, and test procedures to volume production 

Through frequent interactionswith DSP design, DiAxcable design, firmware/controls, and hardware teams, you will feed experimental results back into architecture, designand manufacturabilitydecisions and help transition realized performance gains into the product. 

Required Qualifications, Skills, and Experience  

  • MSEE minimum; PhD in Electrical Engineering or Applied Physics preferred, with specialization in high-speed electronic or electro-optic communication systems 
  • At least 5 years of relevant industry experience with an MSEE, or at least 3 years with a PhD 
  • Experimental work experience in the bring-up and hardware maturity of high-speed DSPs, either coherent (e.g., QPSK, 16QAM, 64QAM) or multi-level PAM (e.g., PAM4) 
  • Foundational understanding of transmitand receive side DSP blocks, with emphasis on equalizers (e.g., FFE, DFE, MLSE) and their tradeoffs, and clock and carrier recovery 
  • Prior hands-on experimental experience measuring high-speed DACs and ADCs 
  • Experience developing calibration methods and transferring them to manufacturing test 
  • Experience developing and/or testing DSP-based control loops 
  • Performance validation and productization experience, including transfer to volume production 
  • Proficiencywith high-speed lab equipment such as real-time and sampling oscilloscopes, BERTs, arbitrary waveform generators, and spectrum and phase noise analyzers 
  • Programming experience in Python and Matlabfor lab automation, modeling, and data analysis; C/C++ a plus 
  • Excellent written and oral communication skills, including the ability to communicate complex information clearly and concisely across multiple platforms and modalities  
  • Resourceful collaborator, supporting teammates and colleagues as needed 

Preferred Qualifications  

  • Prior work experience with coherent optical modules or 224 Gbps/PAM4 AEC modules 
  • Familiarity with related industry standards (e.g., OIF 400ZR/800ZR, OIF CEI-224G, IEEE 802.3dj) 
  • Understanding of forward error correction (e.g., RS/KP4, soft-decision FEC) and its interaction with DSP performance 
  • Experience characterizing RF and mm-wave components (e.g., S-parameters, nonlinear compression) and modeling linear and nonlinear signal impairments 
  • Familiarity with module management and telemetry interfaces (e.g., CMIS) and firmware-based monitoring 
  • Familiarity with RTL/Verilog or hardware-oriented algorithm implementation 
  • Fluent with statistical analysis methods and software repositories (e.g., GitHub, GitLab, Bitbucket, Docker)

Annual Salary Range

$150,000—$250,000 USD

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