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Salary
$140k – $200k per year
Location
Remote (United States)
Seniority
Staff · 5+ years exp
Visa
Filed H-1B visas in the last two years

Confirmed on the employer's own hiring board on Nov 2, 2026. First seen by Alion on Oct 28, 2026. AttoTude scores C on the Alion truth index.

Overview
Company
Impact
Profile match
AttoTude develops terahertz technology for data center networking, with an engine and wire product pairing designed to remove networking bottlenecks for artificial intelligence workloads. Its engineers design digital and mixed-signal chips and system hardware, and the company hires ASIC design engineers, materials scientists and fabrication technicians. The company is headquartered in Menlo Park, California, United States.

We are seeking an experienced EDA/CAD lead engineer to join our growing team. In this role, you will be part of the experience design and layout team to develop cutting-edge mixed-signal ICs. You will be involved in the technical aspects of the ASIC design and development, from concept through to production. This is a hands-on technical position that requires in-depth technical expertise, and the ability to work in a team of highly experienced engineers to accomplish the goals. 

Key Responsibilities:  

  • Floor planning, IP integration 
  • Pad Ring creation 
  • Work with analog/mixed-signal designers for high-performance layout integration 
  • Work with digital designers for DFT/ATPG/Scan logic integration 
  • Perform LVS/DRC checks and fix issues 
  • Integration of Digital/RF/mmWave blocks into IC Top Level 
  • Collaborate with cross-functional teams to ensure timely project execution and design tape-outs 
  • Stay updated with the latest trends and technologies in wideband high speed IC design and apply them to improve project outcomes 
  • Occasional travel to the Bay Area (<20%) for remote position 

Qualifications:  

  • 5+ years of hands-on experience in CMOS (bulk and advanced FinFET) IC implementation in multiple process technologies 
  • Strong experience with Cadence (and various EDA) tools is required (Virtuoso, Calibre, Voltus) 
  • Experience in multiple dedicated tapeout support is required 
  • Scripting language experience in Tcl, Python, Perl, Makefile, and shell scripts are required 

Education:  

  • Formal Cadence digital layout training or certification is required 
  • Bachelor’s degree in electrical engineering, computer science or a related field is preferred 

PreferredSkills:  

  • Experience with CMOS, and/or SiGe Process Development Kits 
  • Experience working on a multidisciplinary team with RF/Mixed Signal, Hardware, Firmware, and Software engineers  
  • Strong communication and teamwork skills 
  • Experience working in fast-paced environments with a strong track record of delivering high-quality designs on time. 

Benefits :  

  • Competitive salary 
  • Stock options plan 
  • Paid time off 
  • Health benefits 

Annual Salary Range

$140,000—$200,000 USD

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