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Salary
$144k – $230k per year
Location
In office (San Jose)
Seniority
Architect · 14+ years exp
Visa
H-1B filings in 12 months: 101 · for this role: 58 · green card filings: 23
Employment
Full-Time

Confirmed on the employer's own hiring board on Nov 9, 2026. First seen by Alion on Nov 9, 2026. Broadcom scores A on the Alion truth index.

Overview
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Impact
Profile match
Broadcom is an American semiconductor and infrastructure software company headquartered in Palo Alto, California, whose chip lineage runs back through Avago to the Hewlett-Packard components division. It designs networking switch and routing silicon that carries a large share of data centre traffic, custom AI accelerators built for hyperscale customers, plus wireless, broadband, storage and optical components. A sequence of very large acquisitions, culminating in the sixty-nine billion dollar purchase of VMware in 2023, has made infrastructure software roughly as important as chips to the group, and it is one of the most valuable listed technology companies in the world.

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Job Description:

ASIC DFT Engineer

Broadcom's ASIC Product Division is seeking candidates for a DFT Engineer position at our San Jose, California Development Center. The successful candidate will participate in SoC DFT implementation, verification, and debug activities including post-silicon bring up.

The candidate will support various phases of SoC DFT-related activities for Broadcom APD’s designs, including test insertion, pattern generation, coverage improvement, and basic silicon debug. The role involves collaborating with cross-functional teams, including Physical Design and STA engineers.

Basic coding/scripting skills in TCL, Perl, Python, C++, or Verilog are expected.

Responsibilities:

  • Understanding Broadcom & customer DFT feature requirements & DPPM goals & defining appropriate DFT specifications for the ASIC
  • Implementing DFT, including Scan, MBIST, TAP, LBIST, IO, SerDes and other I/P DFT integration
  • Working closely with STA and DI Engineers design closure for test
  • Generating, Verifying & Debugging Test vectors before tape release.
  • Validating & Debugging Test vectors on ATE during the silicon bring up phase
  • Assisting with silicon failure analysis, diagnostics & yield improvement efforts
  • Interfacing with the customer, physical design and test engineering/manufacturing teams located globally
  • Working closely with I/P DFT engineers & other stakeholders
  • Debugging customer returned parts on the ATE
  • Innovating newer DFT solutions to solve testability problems in 3nm & beyond
  • Automating DFT & Test Vector Generation flows

Skills/Experience:

  • Strong DFT background (such as IO and Analog DFT, ATPG and/or Scan, BIST, and others)
  • Scan Insertion and scan compression background (DFT Compiler, Mentor TestKompress, etc.)
  • Logic BIST design and debug experience
  • Well-versed in ATPG vector generation, simulation, debug. (TetraMax, Fastscan)
  • Experience in Verilog coding, testbench generation & simulation
  • Memory BIST insertion and verification experience (SRAM, CAM, eDRAM)
  • The ability to work in a multi-disciplined, cross-department environment Solid knowledge in analog and digital circuit design, and device physics fundamentals Good understanding of Si processing, logical and physical synthesis, and transistor reliability principles
  • Excellent problem solving, debug , root cause analysis and communication skills
  • Experience working on ATE is a plus

Education & Experience:

  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field with 14+ years of experience.

Compensation and Benefits

The annual base salary range for this position is USD 143,800.00 To USD 230,000.00

As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.

Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

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