Design Engineer II

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Design Engineer II

This is an opportunity to join a dynamic and growing team of experienced engineers developing physical layer IP’s for industry-standard high-speed serial-link protocols. The successful candidate will ideally be a highly motivated self-starter who can work independently to complete assigned tasks and collaborate with other members to achieve project milestones. It is expected that the candidate will contribute during all phases of firmware development for high speed SERDES - from architecture development to implementation, verification, testing and customer deployment.

Responsibilities

• Work closely with PHY digital and mixed signal architects to figure out the details of FW functions and sequences. Contribute during firmware architecture development and implementation of the defined firmware features.
• Help to build system level prototype control software to develop/validate adaptation, equalization, and control algorithms for high speed SERDES.
• Implement assigned FW features and work closely with verification[simulation] and validation team to ensure the functionality and robustness of the implemented features.
• Support FuSa compliant firmware development. Work closely with verification and validation team to develop and execute test plans for FuSa compliant firmware.
• Support of Validation team during electrical and system characterization during post-silicon testing. Identify any FW and HW related functionality and performance issues and implement any necessary FW improvements to address these issues.
• Support Product Engineering, System Validation and Design team to debug IP issues during customer deployment of the IP and provide hot fixes.
• Create and maintain comprehensive documentation related to firmware design, development, bug fixes and compliance testing.

Desired Skills

• B.Tech with 6yrs or M.Tech with 4 yrs in Electrical/Electronics Engineering
• Solid programming knowledge in C/C++ and Python
• Strong problem-solving and communication skills
• Understanding of wireline communication principles and digital signal processing techniques is a plus
• Knowledge in mixed signal circuit design is a plus
• Experience with silicon validation process and debug is a plus
• Experience with digital verification environment and tools is a plus
• Understanding of FuSa compliance is a plus

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