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Cadence Design Systems is an American software company founded in 1988 that supplies the electronic design automation tools engineers use to design and verify integrated circuits. Its products cover digital synthesis and place-and-route, custom and analogue design, circuit simulation with the Spectre and Virtuoso families, functional verification, and increasingly system-level analysis for packaging, thermal behaviour and computational fluid dynamics. Headquartered in San Jose and listed on Nasdaq, it also licenses design intellectual property such as processor and interface blocks, and competes primarily with Synopsys and Siemens EDA.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Education: BE/ B Tech/ ME/ M Tech / MS : Expr 6 - 15 (T3/T4)

  • B.Tech/BE/ME/Mtech with hands-on experience physical design , timing closure and physical verification.
  • Exp with ASIC design flow, hierarchical physical design strategies, methodologies and understand deep sub-micron technology issues.
  • Solid knowledge on physical design flow, Timing closure and physical verification. Knowledge of formal verification, EM-IR .
  • Good track records of working on complex IP’s & SoC’s below 7 nm
  • Power user of Cadence implementation tools, such as Genus, Innovus, Quantus,Tempus, PVS, Voltus.
  • Automation and programming-minded, coding experience in Makefile/Tcl/Tk/Perl/Python.
  • Any AI expr is add on.
  • Self-motivated, able to work independently or as a team player, excellent verbal and written communication skills.

We’re doing work that matters. Help us solve what others can’t.

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