RTL Engineer ( FPGA)

At Capgemini Engineering, the world leader in engineering services, we bring together a global team of engineers, scientists, and architects to help the world’s most innovative companies unleash their potential. From autonomous cars to life-saving robots, our digital and software technology experts think outside the box as they provide unique R&D and engineering services across all industries. Join us for a career full of opportunities. Where you can make a difference. Where no two days are the same.

Job Description

This is a senior technical role within our team. You have a passion for digital hardware

design, including ASIC and FPGA, system architecture, design verification, and general

troubleshooting. You are a team player with excellent communication skills and experience

collaborating with engineers across different sites and time zones. You possess strong

analytical and problem-solving skills, are eager to learn, and ready to tackle challenges.

KEY RESPONSIBILITIES:

- Understand the design requirements, microarchitecture, and systems architecture of our

team's IP and systems solutions.

- Collaborate with peers, such as design and verification engineers, to understand features

and support requirements.

- Implement key functional blocks compliant with design and architecture specifications

using Verilog.

- Debug test failures to determine the root cause; work with verification and emulation

engineers to resolve design defects and correct any design issues.

PREFERRED EXPERIENCE:

- B.E/M.E/M.Tech or B.S/M.S in EE/ECE with 10+ years of relevant experience in IP design

- Knowledge of Ethernet protocols and IEEE 802.3 standards, such as MAC/PCS/PMA, PTP

(IEEE 1588), pause/flow control, and FEC for speeds from 10GE up to 100GE and beyond.

- Domain knowledge of interfaces such as AXI streaming, AXI4-Lite, and other connectivity

protocols.

- Experience in closing timing of complex designs.

- Proficient in debugging firmware and RTL code using simulation tools.

- Knowledge of ASIC flow tools such as Primetime and Design Compiler, as well as code

coverage and LINT, is an added advantage.

- Self-driven, motivated, and result-oriented individual with superior academic

achievements.

- Excellent interpersonal, written, group communication, and problem-solving skills; a very

good team player.

- Good organizational and execution skills with the ability to multitask, prioritize, and meet

deadlines with high-quality deliverables.

- Good working knowledge of SystemVerilog.

- Scripting language experience: Perl, Python

What you will get working here

• We care about all our employees and want them to feel as comfortable as possible. That's why we offer health insurance from the first days, regardless of the probationary period.
• The Gift from the Company - Christmas holidays from December 25 to December 31.

• Cooperation with Superhumans center and Veteran HUB. Capgemini Engineering has supported the launch of psychological rehabilitation department of Superhumans. Our team also donated over UAH 500 000 prosthetics for three Ukrainian defenders. Currently, we support psychological counseling provided by the Veteran Hub, and we have implemented an internal policy making the company friendly to military and veterans with the assistance of the Hub.

Capgemini is a global business and technology transformation partner, helping organizations to accelerate their dual transition to a digital and sustainable world, while creating tangible impact for enterprises and society. It is a responsible and diverse group of 340,000 team members in more than 50 countries. With its strong over 55-year heritage, Capgemini is trusted by its clients to unlock the value of technology to address the entire breadth of their business needs. It delivers end-to-end services and solutions leveraging strengths from strategy and design to engineering, all fueled by its market leading capabilities in AI, generative AI, cloud and data, combined with its deep industry expertise and partner ecosystem.

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