Senior Digital Designer

Capgemini • Cybersecurity • Government • Bachelor's Degree • Verilog • SystemVerilog • VHDL • 4 days ago
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Salary
≈ $42k – $98k per year (Estimated)
Location
In office (Thessaloniki)
Seniority
Senior · 7+ years exp
Employment
Full-Time

Confirmed on the employer's own hiring board on Oct 6, 2026. First seen by Alion on Sep 11, 2026. Capgemini scores B on the Alion truth index.

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Company
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Profile match

Capgemini

Capgemini is a French information technology services and consulting group founded in Grenoble in 1967 by Serge Kampf, and one of the largest IT service providers in the world. It designs, builds and runs systems for large enterprises and governments across some fifty countries, with a delivery workforce concentrated in India and a European client base heavier than most of its competitors. The group is organised into Capgemini Invent for strategy and design, Capgemini Engineering for research and development services acquired with Altran, and Sogeti for local technology services, and it has reoriented its portfolio around cloud migration, data platforms and generative AI.
capgemini.com • HQ: Paris, France • Research Institutes • Cybersecurity • Government • Science & Engineering • Management Consulting • Engineering Services • Systems Integrators • IT Consulting & Digital Transformation • 5000+ employees • Est. 1967
Tech stack of Capgemini
Backed by Bordeaux Technowest, Gilde Equity Management

Job Description

  • Lead Functional Specification Development for advanced digital systems
  • Design and implement Microarchitecture (uArch) for high-performance blocks
  • Perform RTL Debugging, ensuring design correctness and efficiency
  • Run and analyze Lint Checks and CDC (Clock Domain Crossing) Checks
  • Collaborate with verification, physical design, and architecture teams
  • (Bonus) Contribute to Front-End Synthesis and optimization
  • (Nice to have) Experience working on SoC-level integration and design
  • (Nice to have) Apply Power Optimization Techniques for energy-efficient designs

Job Requirements

  • 7+ years of hands-on experience in digital design
  • Strong knowledge of Verilog and/or VHDL
  • Familiarity with SystemVerilog is a plus
  • Experience with tools like Cadence Genus, Synopsys Design Compiler (DC), or Fusion Compiler is a plus
  • Proven experience in RTL design, uArch development, and functional specs
  • Deep understanding of linting tools, CDC methodologies, and debugging flows
  • Familiarity with synthesis tools and SoC design is a strong plus
  • Bachelor’s degree in EE, ECE, CE, CS, or a related field required
  • MS or PhD highly desired
  • Excellent communication and collaboration skills

Why You’ll Love Working With Us

  • Work on innovative semiconductor products with real-world impact
  • Join a collaborative, forward-thinking engineering team
  • Enjoy a flexible work environment and competitive compensation
  • Opportunities for technical leadership and career growth
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