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Salary
$107k – $179k per year
Location
In office (Ottawa, Vancouver)
Seniority
Junior · 2+ years exp

Confirmed on the employer's own hiring board on Nov 1, 2026. First seen by Alion on Mar 17, 2026. Celero Communications scores B on the Alion truth index.

Overview
Company
Impact
Profile match
Celero Communications is a semiconductor start-up building technology for next-generation high-speed communication and connectivity. Its open roles include principal physical design engineers and high-speed analog layout design engineers, with engineering teams in Irvine, San Jose and Ottawa. The company is headquartered in Laguna Beach, California, United States.

About the Role: 

Celero Communications Inc. is an exciting and fast-growing start-up in the semiconductor industry, pushing boundaries with innovative technologies that power the world’s most advanced AI and data center infrastructure.

We are looking for skilled and motivated DSP design engineers to join our team and help us build optical transceivers for next-generation optical modems. The ideal candidate must have a strong theoretical background in digital signal processing, digital communications, and fiber-optic communication systems, with experience developing DSP algorithms for high-speed communication systems. Candidates with industry experience are preferred.

Locations: Ottawa, Ontario, Canada and Vancouver, British Columbia, Canada

Key Responsibilities

  • Research, develop, and evaluate digital signal processing (DSP) algorithms for high-speed optical communication systems.
  • Design and optimize DSP blocks used in optical transceivers, including adaptive equalization, timing recovery, carrier phase recovery, polarization demultiplexing, and nonlinear compensation.
  • Develop system-level simulation models of optical communication links and evaluate DSP algorithm performance under realistic channel conditions.
  • Analyze performance under various impairments such as noise, chromatic dispersion, polarization effects, and hardware non-idealities.
  • Verify and optimize algorithm performance through floating-point and fixed-point simulations.
  • Develop bit-accurate and cycle-accurate models to support ASIC implementation.
  • Document design details and collaborate with ASIC, firmware, and verification teams to ensure reliable implementation in silicon.

Preferred Qualifications

  • Master’s or Ph.D. degree in Electrical Engineering, Physics, or Mathematics.
  • Minimum of two years of industry experience in related fields.
  • Strong background in digital signal processing and digital communications.
  • Experience with DSP algorithms for optical communication systems.
  • Programming experience in C/C++, Python, MATLAB, or similar languages.
  • Experience in modeling communication systems.
  • Familiarity with forward error correction (FEC) schemes used in communication systems.
  • Experience modeling optical components and electrical frontends of optical transceivers.
  • Experience with version control systems, specifically GitHub.
  • Familiarity with Verilog or VHDL is a plus.
  • Team player with a mindset focused on the successful delivery of the first product.

Why Join Us

  • The chance to play a foundational role at a high-growth semiconductor start-up.
  • Work on cutting-edge optical communication technologies for AI and data center connectivity.
  • A collaborative, international team culture where ideas and initiative are valued.
  • The opportunity to grow alongside Celero as we scale and shape the future of our industry.

Salary Range

$150,000 - $250,000 Base Annually 

The final offer will be determined based on job-related skills, experience, qualifications, and location.

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