Senior Verification Engineer

Qualifications :

Bachelor's or Master's degree in Electrical Engineering or a related field.

Required Skills and Experience :

- 8+ years of experience in FPGA/ASIC functional verification with strong focus on C-based or embedded software-driven pre-silicon verification.

- Experience with RISC-V, ARM-based SoCs, or embedded CPU verification.

- Hands-on experience developing C/C++ testcases and verification frameworks for FPGA/SoC verification.

- Strong understanding of FPGA architectures, SoC subsystems, memory architectures, interrupts, DMA, boot flows, and embedded processors.

- Strong scripting skills in Python, Shell, Perl, and TCL.

- Experience with coverage-driven and assertion-based verification methodologies.

- Experience developing constrained-random and directed simulation testcases using System Verilog/UVM; knowledge of C-based testcase development is a plus.

- Solid understanding of IC chip design, development flows, and verification methodologies.

- Proven ability to develop verification plans, build robust UVM testbenches, define functional coverage models, execute regressions, analyze coverage gaps, and drive closure against verification goals.

- Strong analytical, debugging, and problem-solving skills.

- Excellent written and verbal communication skills in English.

Skills

FPGA, ASIC, System Verilog, UVM, Verification, C, C++, Functional Verification, SoC, ARM